“…39 Studies have shown that if the surface area doubles the AES intensity is cut by 30 % or greater. 60,61 However, the roughness of the surfaces considered in this dissertation are relatively smooth (RMS roughness of < 15 nm), and therefore changes in surface area are relatively small (< 4 %). Therefore, surface roughness is not likely to play a role in AES peak intensities.…”
PALLADIUM AND NICKEL INTERACTIONS WITH STEPPED 6H-SILICON CARBIDE Andrew A. Woodworth Silicon carbide (SiC) has long been recognized as a semiconductor with potential for use in a number demanding environments. Recent developments in the quality of bulk grown 6H-SiC (and other hexagonal poly-types) have increased interest in issues surrounding the stability of device structures that operate at temperatures in excess of 600 o C. It has been observed that the performance of metal-semiconductor devices created on SiC tend to degrade when operating at these temperatures. This change in device performance has been linked to inter-diffusion and reaction at the metalsemiconductor interface. Most of these devices have been fabricated on SiC substrates with surface and sub-surface damage associated with the polishing process (standard surfaces). Recent studies have shown that high temperature hydrogen etching of these substrates removes this damage and produces surfaces with wide atomically flat terraces and nanometer scale steps (stepped surfaces). The basic question this poses is, can such improvements in substrate quality lead to improvements in device performance. The goal of this research is to better understand the interaction of metals on these stepped surfaces. To accomplish this, detailed surface studies of thermally induced Pd-SiC and Ni-SiC surface interactions have been performed on both the standard and stepped surfaces. The metal films range in thickness from the monolayer level (~0.4 nm) to actual device dimensions (~50 nm) and are deposited under ultrahigh vacuum conditions at ~50 o C. These films were characterized in-situ using Auger electron spectroscopy both before and after annealing at 670 o C for Pd and 700 o C for Ni. The Auger lineshapes provide quantitative and qualitative information on the chemistry of the reaction products. Ex-situ atomic force microscopy was used to characterize changes in surface morphology. The results of these experiments yield important insights into the nature of the transport process at the metal-semiconductor interface and the influence of initial surface structure in these processes. In addition differences in the interfacial chemistry for carbide forming metals has been revealed. The results provided insight into the mechanisms where by improvements in substrate quality may lead to improvements in device performance.
“…39 Studies have shown that if the surface area doubles the AES intensity is cut by 30 % or greater. 60,61 However, the roughness of the surfaces considered in this dissertation are relatively smooth (RMS roughness of < 15 nm), and therefore changes in surface area are relatively small (< 4 %). Therefore, surface roughness is not likely to play a role in AES peak intensities.…”
PALLADIUM AND NICKEL INTERACTIONS WITH STEPPED 6H-SILICON CARBIDE Andrew A. Woodworth Silicon carbide (SiC) has long been recognized as a semiconductor with potential for use in a number demanding environments. Recent developments in the quality of bulk grown 6H-SiC (and other hexagonal poly-types) have increased interest in issues surrounding the stability of device structures that operate at temperatures in excess of 600 o C. It has been observed that the performance of metal-semiconductor devices created on SiC tend to degrade when operating at these temperatures. This change in device performance has been linked to inter-diffusion and reaction at the metalsemiconductor interface. Most of these devices have been fabricated on SiC substrates with surface and sub-surface damage associated with the polishing process (standard surfaces). Recent studies have shown that high temperature hydrogen etching of these substrates removes this damage and produces surfaces with wide atomically flat terraces and nanometer scale steps (stepped surfaces). The basic question this poses is, can such improvements in substrate quality lead to improvements in device performance. The goal of this research is to better understand the interaction of metals on these stepped surfaces. To accomplish this, detailed surface studies of thermally induced Pd-SiC and Ni-SiC surface interactions have been performed on both the standard and stepped surfaces. The metal films range in thickness from the monolayer level (~0.4 nm) to actual device dimensions (~50 nm) and are deposited under ultrahigh vacuum conditions at ~50 o C. These films were characterized in-situ using Auger electron spectroscopy both before and after annealing at 670 o C for Pd and 700 o C for Ni. The Auger lineshapes provide quantitative and qualitative information on the chemistry of the reaction products. Ex-situ atomic force microscopy was used to characterize changes in surface morphology. The results of these experiments yield important insights into the nature of the transport process at the metal-semiconductor interface and the influence of initial surface structure in these processes. In addition differences in the interfacial chemistry for carbide forming metals has been revealed. The results provided insight into the mechanisms where by improvements in substrate quality may lead to improvements in device performance.
“…In contrast to the other epitaxial growth techniques, MBE exhibits unique advantages. Because the deposition process of the sample is carried out in an ultra-high vacuum environment, the sample surface can be observed in situ by reflection high-energy electron diffraction, 178 Auger electron spectroscopy, 179 optical reflection 180 and laser interference 181 during its growth. These powerful control and analysis devices eliminate much of the uncertainty in the sample preparation process of OMBD and make it possible to construct complex device configurations taking advantage of this growth technique.…”
The latest advancements in two-dimensional organic–inorganic van der Waals heterojunctions, including their classification, construction, and device applications, elucidating their structure–property relationship based on interface engineering.
The mechanism of atomic layer epitaxy (ALE) of cadmium telluride has been studied. Auger electron spectroscopy is used to measure the isothermal re-evaporation rates of elemental Cd and Te deposits on the (111)A and (111)B surfaces of CdTe substrates. The results include an observation that the sticking coefficients of Cd and Te are smaller than unity a t the growth temperatures typical of CdTe ALE. After desorption the substrates are left partially covered : 35% by a Cd overlayer on the (1 1 l ) B surface and 72% by Te on the (1 1 l)A surface. The re-evaporation rates of Cd and Te experience a drastic change near the substrate-deposit interface. These rates appear two orders of magnitude smaller than those of bulk-like amorphous Cd and Te solids. The activation energies for reevaporation of the near-interface layer region are estimated to be: 1.5 eV for Te on the (111)A face, 1.0 eV for Te on (111)B and 0.5 eV for Cd on (111)B. It has also been shown that AES can be used to identify the polarity of the CdTe(ll1) surfaces. The relative difference in peak-to-peak intensity ratios of Cd MNN to Te MNN for (111)A and 111)B is (11 f 2)%.
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