ASSYNT: efficient assembly code generation for digital signal processors starting from a data flowgraph

Desmet, D.; Genin, D.

doi:10.1109/icassp.1993.319431

Cited by 7 publications

(3 citation statements)

References 6 publications

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“…Coordination languages with dataflow semantics are described by Suhler et al [94], Gifford and Lucassen [44], Onanian [77], Printz [82], and Rasure and Williams [84]. Contrast these to the approach of Reekie [85] and the DSP Station from Mentor Graphics [41], where new actors are defined in a language with semantics identical to those of the visual language. There are compelling advantages to that approach, in that all compiler optimizations are available down to the level of the host language primitives.…”

Section: Experimenting With Language Designmentioning

confidence: 99%

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Dataflow process networks

Lee¹,

Parks²

1995

Proc. IEEE

742

476

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We review a model of computation used in industrial practice in signal processing software environments and experimentally in other contexts. We give this model the name "dataflow process networks," and study its formal properties as well as its utility as a basis for programming language design. Variants of this model are used in commercial visual programming systems such as SPW from the Alta Group of Cadence (formerly Comdisco Systems), COSSAP from Synopsys (formerly Cadis), the DSP Station from Mentor Graphics, and Hypersignal from Hyperception. They are also used in research sofhyare such as Khoros from the University of New Mexico and Ptolemy from the University of California at Berkeley, among many others. Dataflow process networks are shown to be a special case of Kahn process networks, a model of computation where a number of concurrent processes communicate through unidirectional FIFO channels, where writes to the channel are nonblocking, and reads are blocking. In dataflow process networks, each process consists of repeated "jirings" of a dataflow "actor." An actor defines a (often functional) quantum of computation. By dividing processes into actor jirings, the considerable overhead of context switching incurred in most implementations of Kahn process networks is avoided. We relate dataflow process networks to other dataflow models, including those used in dataflow machines, such as static dataflow and the tagged-token model. We also relate dataflow process networks to functional languages such as Haskell, and show that modem language concepts such as higher-order functions and polymorphism can be used effectively in dataflow process networks. A number of programming examples using a visual syntax are given. I. MOTIVATION This paper concerns programming methodologies commonly called "graphical dataflow programming" that are used extensively for signal processing and experimentally for other applications. In this paper, "graphical" means simply that the program is explicitly specified by a directed

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Section: Experimenting With Language Designmentioning

confidence: 99%

“…The output of compilation can be a standard procedural language, such as C, assembly code for programmable DSP processors [80], or even specifications of silicon implementations [37]. Often, considerable effort is put into optimized compilation (see for example [15], [41], [811, [881).…”

mentioning

confidence: 99%

Dataflow process networks

Lee¹,

Parks²

1995

Proc. IEEE

742

476

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show abstract

“…7 shows an example for a simple unary trellis diagram. 8. An example for a simple binary trellis diagram.…”

Section: Constrained Expression Treesmentioning

confidence: 99%

Automatic generation of optimized DSP assembly code

Wess

Kreuzer

Gotschlich

Proceedings of IECON '95 - 21st Annual Conference on IEEE Industrial Electronics

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This paper describes a data flow graph compiler for the Analog Devices' fixed-point DSP family ADSP-210x. In the first step, the graphs are transformed into constrained expression trees. Next, optimized straight-line code is generated based on the trellis tree concept. Scheduling, register allocation, and instruction selection amount to looking for minimal weighted paths in trellis trees. In the final compaction step, instruction level parallelism is exploited by combining two or more instructions into one. Experimental results show that highly optimized instruction code can be produced within a very short compilation time.

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Tailoring Software Pipelining for Effective Exploitation of Zero Overhead Loop Buffer

2003

Software and Compilers for Embedded Systems

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ASSYNT: efficient assembly code generation for digital signal processors starting from a data flowgraph

Cited by 7 publications

References 6 publications

Dataflow process networks

Dataflow process networks

Automatic generation of optimized DSP assembly code

Tailoring Software Pipelining for Effective Exploitation of Zero Overhead Loop Buffer

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