2019
DOI: 10.1002/adfm.201900155
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Associative Memory for Image Recovery with a High‐Performance Memristor Array

Abstract: Associative memory is one of the significant characteristics of the biological brain. However, it has yet to be realized in a large memristor array due to the high requirements on the memristor device. In this work, the multilevel memristor cell is optimized by employing an electro-thermal modulation layer. Memristor devices show both high resistance, cell-to-cell uniformity, and multilevel resistive switching behaviors with good reliability. A Hopfield neural network is experimentally demonstrated on a 1k mem… Show more

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Cited by 54 publications
(46 citation statements)
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“…Therefore, 1T1M crossbar arrays have already been widely studied. 6,[13][14][15][16][17][18][19][20][21][22][23][24] Wu's group fabricated a 128 Â 8 1T1M crossbar array of TiN/TaO x /HfAlyO x /TiN devices. 25 Using this 1024-cell array with parallel online training, a grey-scale face classication is demonstrated for the rst time experimentally.…”
Section: T1mmentioning
confidence: 99%
“…Therefore, 1T1M crossbar arrays have already been widely studied. 6,[13][14][15][16][17][18][19][20][21][22][23][24] Wu's group fabricated a 128 Â 8 1T1M crossbar array of TiN/TaO x /HfAlyO x /TiN devices. 25 Using this 1024-cell array with parallel online training, a grey-scale face classication is demonstrated for the rst time experimentally.…”
Section: T1mmentioning
confidence: 99%
“…Since 2015, there has been an increase in the number of publications regarding a hardware implementation of the simplest artificial neural networks (ANNs) (most often in the form of a single-layer perceptron) based on a limited number of memristive connections (Prezioso et al, 2015;Serb et al, 2016;Yao et al, 2017). Larger integrated memristive 1T-1R or passive cross-bar arrays have been fabricated and shown to date (Cai et al, 2019;Kataeva et al, 2019;Zhou et al, 2019) to implement various multiplication operations and neuromorphic functionality on the basis of precise analog tuning the conductance of memristive devices. Although some higher functionalities of board-integrated systems like multilayer perceptron (Bayat et al, 2018;Li et al, 2018a;Mikhaylov et al, 2018) and the first fully memristive neural network with unsupervised learning (Wang et al, 2018) were demonstrated and revolutionized, the higher functionalities are still restricted with a practical size up to 64 × 128 of memristive arrays.…”
Section: Memristive Devices: Toward Cmos Integrationmentioning
confidence: 99%
“…where W presents the weight to be stored, R p0 and R n0 are the corresponding memristance that is mapped into ''positive'' and ''negative'' values without tuning, respectively, R p and R n are the memristance updated by (11) and (12), respectively, and R min and R max are the minimum and maximum memristor resistances, respectively.…”
Section: A Proposed Recursive Circuit Schemementioning
confidence: 99%
“…As a result, these algorithms perform poorly when handling large problems and cannot leverage analog computing architectures. Although several memristorcrossbar-based recursive circuits [11]- [14] that have comparatively simple structure with parallel computing capability have been developed for Hopfield neural networks and eigenvector solver, there are many differences between these works and the proposed work in terms of optimization algorithms. None of these works targets for constrained optimizations; the design purpose, delay/error source, and the rule/complexity of the recursive process are very different; and the circuitlevel design for the nonconvex optimization algorithm is still absent.…”
Section: Introductionmentioning
confidence: 99%