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Conventional hardware platforms consume huge amount of energy for cognitive learning due to the data movement between the processor and the off-chip memory. Brain-inspired device technologies using analogue weight storage allow to complete cognitive tasks more efficiently. Here we present an analogue non-volatile resistive memory (an electronic synapse) with foundry friendly materials. The device shows bidirectional continuous weight modulation behaviour. Grey-scale face classification is experimentally demonstrated using an integrated 1024-cell array with parallel online training. The energy consumption within the analogue synapses for each iteration is 1,000 × (20 ×) lower compared to an implementation using Intel Xeon Phi processor with off-chip memory (with hypothetical on-chip digital resistive random access memory). The accuracy on test sets is close to the result using a central processing unit. These experimental results consolidate the feasibility of analogue synaptic array and pave the way toward building an energy efficient and large-scale neuromorphic system.

Neuromorphic computing is an emerging computing paradigm beyond the conventional digital von Neumann computation. An oxide-based resistive switching memory is engineered to emulate synaptic devices. At the device level, the gradual resistance modulation is characterized by hundreds of identical pulses, achieving a low energy consumption of less than 1 pJ per spike. Furthermore, a stochastic compact model is developed to quantify the device switching dynamics and variation. At system level, the performance of an artificial visual system on the image orientation or edge detection with 16 348 oxide-based synaptic devices is simulated, successfully demonstrating a key feature of neuromorphic computing: tolerance to device variation.

As the research on artificial intelligence booms, there is broad interest in brain‐inspired computing using novel neuromorphic devices. The potential of various emerging materials and devices for neuromorphic computing has attracted extensive research efforts, leading to a large number of publications. Going forward, in order to better emulate the brain's functions, its relevant fundamentals, working mechanisms, and resultant behaviors need to be re‐visited, better understood, and connected to electronics. A systematic overview of biological and artificial neural systems is given, along with their related critical mechanisms. Recent progress in neuromorphic devices is reviewed and, more importantly, the existing challenges are highlighted to hopefully shed light on future research directions.

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Owing to their attractive application potentials in both non-volatile memory and unconventional computing, memristive devices have drawn substantial research attention in the last decade. However, major roadblocks still remain in device performance, especially concerning relatively large parameter variability and limited cycling endurance. The response of the active region in the device within and between switching cycles plays the dominating role, yet the microscopic details remain elusive. This Review summarizes recent progress in scientific understanding of the physical origins of the non-idealities and propose a synergistic approach based on in situ characterization and device modeling to investigate switching mechanism. At last, the Review offers an outlook for commercialization viability of memristive technology.

Reservoir computing is a highly efficient network for processing temporal signals due to its low training cost compared to standard recurrent neural networks, and generating rich reservoir states is critical in the hardware implementation. In this work, we report a parallel dynamic memristor-based reservoir computing system by applying a controllable mask process, in which the critical parameters, including state richness, feedback strength and input scaling, can be tuned by changing the mask length and the range of input signal. Our system achieves a low word error rate of 0.4% in the spoken-digit recognition and low normalized root mean square error of 0.046 in the time-series prediction of the Hénon map, which outperforms most existing hardware-based reservoir computing systems and also software-based one in the Hénon map prediction task. Our work could pave the road towards high-efficiency memristor-based reservoir computing systems to handle more complex temporal tasks in the future.

The three-dimensional (3D) cross-point array architecture is attractive for future ultra-high-density nonvolatile memory application. A bit-cost-effective technology path toward the 3D integration that requires only one critical lithography step or mask for reducing the bit-cost is demonstrated in this work. A double-layer HfOx-based vertical resistive switching random access memory (RRAM) is fabricated and characterized. The HfOx thin film is deposited at the sidewall of the predefined trench by atomic layer deposition, forming a vertical memory structure. Electrode/oxide interface engineering with a TiON interfacial layer results in nonlinear I-V suitable for the selectorless array. The fabricated HfOx vertical RRAM shows excellent performances such as reset current (<50 μA), switching speed (<100 ns), switching endurance (>10(8) cycles), read disturbance immunity (>10(9) cycles), and data retention time (>10(5) s @ 125 °C).