Assessment of room-temperature phonon-limited mobility in gated silicon nanowires

Abstract

The technologically important question of whether the reduced density of electron states (DOS) for scattering in one-dimensional (1D) wire transport devices gives an advantage over the planar metal–oxide–semiconductor field-effect-transistor (MOSFET) for electron mobility is assessed by simulations. We self-consistently solve the Schrödinger–Poisson equations to calculate phonon-limited electron mobility in a multisubband cylindrical Si gated wire. We find that the benefit of reduced 1D DOS is offset by an increased phonon scattering rate due to increased electron–phonon wave function overlap and results in a degraded mobility in narrow wires. The applied gate bias voltage and the wire size control the transition from wire geometry to surface field-dominated confinement. The size scale for this 1D to two-dimensional (2D) transition is also found to be surprisingly small: A wire with a 75 A radius has an essentially 2D DOS and has a 2D mobility that is degraded from the planar (100) MOSFET due to the anisotropy of the inversion mobility in different Si crystallographic planes.

Growth, Thermodynamics, and Electrical Properties of Silicon Nanowires

“…225 At these size ranges also, phonon scattering in nanowires differs from its bulk Si equivalent. According to Kotlyar et al, 226 phonon scattering is increased due to an increased overlap between the electron and phonon wave function, which would cause a further mobility degradation. Most experimental studies indeed indicate that charge carrier mobilities in silicon nanowires are somewhat smaller than those in bulk Si.…”

Bandstructure and mobility variations in p-type silicon nanowires under electrostatic gate field

“…In those works the electronic structure was calculated using approaches varying from continuum effective mass descriptions [13,14], to k·p [15,16,17] and atomistic tight-binding (TB) [11,12,18,19,20,21,22], or even DFT [23]. Transport methodologies from semiclassical to fully quantum mechanical were also utilized.…”

Compact Modeling of Ballistic Nanowire MOSFETs

“…On the other hand, the charge density |Q| in (12) for the case V G < V t is smaller than that for the case of V G > V t by some orders of magnitude, and the right-hand side of (12) is negligibly small compared to each term in the left-hand side of (12). Thus, we have approximately…”

“…Equation (12) suggests that, when the gate bias increases, the bias increase applied to the gate insulator is reduced by an amount equal to the increase in the electrochemical potential caused by the increase in carriers. The effect is also represented by a series connection of capacitances C G and C Q .…”