2019 XXXIV Conference on Design of Circuits and Integrated Systems (DCIS) 2019
DOI: 10.1109/dcis201949030.2019.8959845
|View full text |Cite
|
Sign up to set email alerts
|

Assessing the Effectiveness of the Test of Power Devices at the Board Level

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
2
1
1
1

Citation Types

0
5
0

Year Published

2020
2020
2022
2022

Publication Types

Select...
3
1

Relationship

0
4

Authors

Journals

citations
Cited by 4 publications
(5 citation statements)
references
References 9 publications
0
5
0
Order By: Relevance
“…Therefore, it is necessary to identify a test strategy to verify the presence of critical faults. In general, the effects of the non-critical faults are compensated by the FAN9673 analog controller, as discussed in [39]. In other words, the PSU control system acts on the IGBTs for compensating the effect of the injected fault.…”
Section: The Fmeca Resultsmentioning
confidence: 99%
See 4 more Smart Citations
“…Therefore, it is necessary to identify a test strategy to verify the presence of critical faults. In general, the effects of the non-critical faults are compensated by the FAN9673 analog controller, as discussed in [39]. In other words, the PSU control system acts on the IGBTs for compensating the effect of the injected fault.…”
Section: The Fmeca Resultsmentioning
confidence: 99%
“…As discussed in Section 2, the structural model for the E/E subsystems is the circuit diagram. In addition, as discussed in Section 2.3 and in [38,39], in this paper, we consider only the catastrophic faults model applied at the SSUT circuit diagram level or inside a power device. The catastrophic faults are modeled by adding different electrical switches in the circuit diagram of the SSUT.…”
Section: Proposed Approachmentioning
confidence: 99%
See 3 more Smart Citations