Area-efficient read/write circuit for spintronic memristor based memories

Nafea, Sherif F.; Dessouki, Ahmed A. S.; El-Rabaie, El-Sayed M.; Elnaghi, Basem E.; Ismail, Yehea; Mostafa, Hassan

doi:10.1109/mwscas.2017.8053230

Cited by 4 publications

(2 citation statements)

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“…In order to eliminate this offset, scholars have carried out relevant research and achieved remarkable results [18][19][20][21][22][23][24][25][26][27][28][29][30][31][32][33][34]. They can be divided into two categories: one is completely composed of memristors.…”

Section: Introductionmentioning

confidence: 99%

“…In 2014, M. Abdullah et al evaluated the impact of process changes on the electrical performance of TiO2 thin film memristor through modeling analysis and Monte Carlo simulation [23] and improved the writing and reading efficiency of the device by finding the best writing input flux and the best threshold, respectively. S. F. Nafea et al proposed a memory read-write circuit based on spintronics memristor in [24]. The proposed read-write circuit can significantly reduce the occupied area.…”

Section: Introductionmentioning

confidence: 99%

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Memristor-Based Read/Write Circuit with Stable Continuous Read Operation

Bao

Zheng

et al. 2022

Electronics

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In recent years, computation-intensive applications, such as artificial intelligence, video processing and encryption, have been developing rapidly. On the other hand, the problems of “storage wall” and “power consumption wall” for the traditional storage and computing separated architectures limit the computing performance. The computational circuits and memory cells based on nonvolatile memristors are unified and become a competitive solution to this problem. However, there are various problems that prevent memristor-based circuits from entering practical applications, one of which is the memristor state deviation problem caused by continuous reading. In this paper, we study some circuits studied by predecessors on read/write circuit, compare the experimental results, analyze the reason for the resistance state deviation of memristor, and put forward a new parallel structure of memristor based on opposite polarity. The logic “1” and logic “0” are represented by the positive and negative voltage difference of two memristors with opposite polarity, which can effectively alleviate the problem of the resistance state deviation caused by continuous reading. A reading voltage of 2 V is applied to the four circuits at the same time, and continuous reading is carried out until the output voltage becomes stable. The voltage offset of the optimized circuit when reading logic “0” is reduced to 78 mV, which is significantly smaller than that of other circuits. In addition, when reading logic “1”, it has the effect of enhancing the information stored in the memristor.

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