Architectures for large-capacity CAMs

Schultz, K.J.; Gulak, P.G.

doi:10.1016/0167-9260(95)00006-2

Cited by 17 publications

(6 citation statements)

References 16 publications

(31 reference statements)

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“…In addition, this scheme allows a tradeoff between search speed and energy per search. Finally, the proposed scheme can be used in conjunction with CAM architectures such as selective precharge [5] and preclassification [10].…”

Section: Discussionmentioning

confidence: 99%

A mismatch-dependent power allocation technique for match-line sensing in content-addressable memories

Arsovski

Sheikholeslami

2003

IEEE J. Solid-State Circuits

161

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In the conventional content-addressable memory (CAM), equal power is consumed to determine if a stored word is matched to a search word or mismatched, independent of the number of mismatched bits. This paper presents a match-line (ML) sensing scheme that allocates less power to match decisions involving a larger number of mismatched bits. Since the majority of CAM words are mismatched, this scheme results in a significant CAM power reduction. The proposed ML sensing scheme is implemented in a 256 144-bit ternary CAM for a 0.13-m 1.2-V CMOS logic process. For a 2-ns search time on a 144-bit word, the proposed scheme saves 60% of the power consumed by the conventional sensing scheme.Index Terms-Associative memory, content-addressable memory (CAM), current sensing, high speed, low power, match-line sensing, mismatch dependent, neural network, pattern matching, string matching.

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Section: Discussionmentioning

confidence: 99%

A mismatch-dependent power allocation technique for match-line sensing in content-addressable memories

Arsovski

Sheikholeslami

2003

IEEE J. Solid-State Circuits

161

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“…The first concept is a Bit-Parallel and Block-Parallel (BPBP) search instead of the a Bit-Parallel and Word-Parallel (BPWP) search, which is often applied in a conventional fully-parallel CAM. The second concept is a categorization of the stored reference words [3]. As a result, the increase of the comparator number due to the multiple ports is limited.…”

Section: A Original Fmcam Architecturementioning

confidence: 99%

“…2) Counting value setting mode: For decreasing the number of comparators, the original FMCAM exploits a categorization concept [3]. The stored reference words are classified into plural categories according to a pre-defined rule.…”

Section: ) Multiple/single Search Modementioning

confidence: 99%

Application of Multi-ported CAM for Parallel Coding

Kumaki

Kouno

Ishizaki

et al. 2006

APCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems

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This paper presents a parallel coding architecture using a flexible multi-ported content addressable memory (CAM). A previously reported Flexible Multi-port Content Addressable Memory (FMCAM) technology [1] is improved by additional schemes for a single search mode and counting value setting and enables the fast parallel coding operation. Evaluation results for Huffman encoding within the JPEG application show that the proposed architecture can reduce the required clock-cycle number by 93% is comparison to a conventional DSP. Furthermore, the performance per unit area, measured in MOPS/mm 2 , can be improved by a factor 3.8 in comparison to a conventional DSP.

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“…In CAM, the hardware complexity, such as the number of comparators, increases very rapidly compared to the processing speed [9]. This gives rise to the problem that the capacity of the contents table, which is the internal memory used to store the comparison data, is limited.…”

Section: Background Of Multiport Structurementioning

confidence: 99%

“…As a solution to this problem, the comparison data are categorized [5,9]. This approach is usually applied to BPWP (bit-parallel word-parallel) search [15].…”

Section: Problems Of Multiport Structurementioning

confidence: 99%

A flexible multiport content-addressable memory

2006

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SUMMARYThis paper is concerned with content-addressable memory (CAM), which is a kind of functional memory. Flexible multiport content-addressable memory (FMCAM) is proposed, in which flexible retrieval functions and a multiport structure are realized. The implementation and an evaluation are presented. It is known that CAM offers high speed of the matching retrieval function. On the other hand, there are problems in practice concerning the relation between the processing speed and the number of comparators, and also the problem of cost, which have prevented its widespread use. Consequently, we developed the following FMCAM. Multiport CAM is realized by reducing the increase of the number of comparators while retaining highspeed matching retrieval functions. Functions for flexible retrieval can be added by implementation in an FPGA. By the categorization process and the use of a ring counter, multiple processing operations can be performed immediately while reducing the number of comparators. This improves the performance of the CAM itself. Another advantage is that FMCAM alone can perform the same processing in situations in which parallel CAM should be applied. After implementing the proposed FMCAM, several tests were performed for comparison. Excellent values were obtained: the AT product was 37.5% lower on average than in conventional CAM, and the increase in hardware complexity was by a factor of 1.57 even if the number of ports was increased by a factor of 4.

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Architectures for large-capacity CAMs

Cited by 17 publications

References 16 publications

A mismatch-dependent power allocation technique for match-line sensing in content-addressable memories

A mismatch-dependent power allocation technique for match-line sensing in content-addressable memories

Application of Multi-ported CAM for Parallel Coding

A flexible multiport content-addressable memory

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