Architectures for fault-tolerant spacecraft computers

Rennels, D. A.

doi:10.1109/proc.1978.11115

Cited by 43 publications

(12 citation statements)

References 6 publications

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“…The views and opinions of authors expressed herein do not necessarily state jr reflect those of the United States Government or any agency thereof. 1 …”

Section: Disclaimermentioning

confidence: 99%

“…System level latchup mitigation and fault-tolerant computing technologies address concerns of Single Event Upsets (SEU) and destructive Single Event Phenomena (SEP), due to cosmic ray particles or weapon generated prompt ionization pulses [1,2,3]. Mitigating the latchup current effects at the system level rather then the part level removes the restriction that all parts must be latchup immune.…”

Section: Mastermentioning

confidence: 99%

See 1 more Smart Citation

Single event and TREE latchup mitigation for a star tracker sensor: An innovative approach to system level latchup mitigation

Kimbrough¹,

Colella²,

Davis

et al. 1994

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This paper presents an innovative "blink" approach rather than the typical "operate through" approach to achieve system level latchup mitigation on a prototype star tracker camera. Included are circuit designs, flash x-ray test data, and heavy ion data demonstrating latchup mitigation protecting m icro-electronics from current latchup and burnout due to Single Event Latchup (SEL) and Transient Radiation Effects on Electronics (TREE).

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“…The views and opinions of authors expressed herein do not necessarily state jr reflect those of the United States Government or any agency thereof. 1 …”

Section: Disclaimermentioning

confidence: 99%

Section: Mastermentioning

confidence: 99%

Single event and TREE latchup mitigation for a star tracker sensor: An innovative approach to system level latchup mitigation

Kimbrough¹,

Colella²,

Davis

et al. 1994

View full text Add to dashboard Cite

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“…Definition 15: The E-path propagation time, EQ, of the E-path Q is the sum of the minimum response times bmn of all internal arcs (Ik ok) in Q.…”

Section: A Structural Interconnection Modelmentioning

confidence: 99%

“…The totally self-checking (TSC) model has led to many significant results in the areas of combinational circuit design [4], [5], sequential circuit design [6]- [8], and check circuit design [9]- [12]. Recently, several researchers have considered the use of TSC circuits in an LSI environment [13]- [15].…”

Section: Introductionmentioning

confidence: 99%

A Theory of Totally Self-Checking System Design

Smith

Lam

1983

IEEE Trans. Comput.

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Abstract-A totally self-checking digital system uses error detecting codes at subsystem interfaces to detect faults before they can lead to harmful undetected errors. This paper develops a formal model for studying totally self-checking systems.Totally self-checking systems are first defined, and, because the propagation of errors is of critical interest, properties characterizing error propagation are defined. For a given subsystem the "propagation graph" is used to represent the error propagation characteristics. The model is completed by defining a system's "interconnection graph" which is formed by connecting the propagation graphs of the subsystems. Then sufficient conditions for which a system is totally selfchecking are stated in terms of the model. The paper concludes with applications of the model including system design, checker placement, data contamination analysis, and fault diagnosis.

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“…On-board computing [12] is formed of subsystems, which serve the needs of individual spacecraft subsystems. For fault-tolerance, physical dual redundancy is used, consisting of a primary and a redundant node.…”

mentioning

confidence: 99%

Survey and future directions of fault-tolerant distributed computing on board spacecraft

Fayyaz

Vladimirova

2016

Advances in Space Research

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Current and future space missions demand highly reliable on-board computing systems, which are capable to carry out high-performance data processing. At present no single computing scheme could efficiently tackle high-performance computing as well as reliability. This paper aims to address that gap. In the first part of the paper, a detailed survey of fault-tolerant distributed computing systems for space applications is presented. Fault types and performance parameters for assessment of a fault-tolerant system are introduced. Redundancy schemes for distributed systems are analysed. A review of the state-of-the-art on fault-tolerant distributed systems is presented and limitations of current approaches are discussed. In the second part of the paper, a new fault-tolerant distributed computing platform with wireless links among the computing nodes is proposed. Novel algorithms, enabling important aspects of the architecture, such as time slot priority adaptive fault-tolerant channel access and fault-tolerant distributed computing using task migration are introduced.

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Architectures for fault-tolerant spacecraft computers

Cited by 43 publications

References 6 publications

Single event and TREE latchup mitigation for a star tracker sensor: An innovative approach to system level latchup mitigation

Single event and TREE latchup mitigation for a star tracker sensor: An innovative approach to system level latchup mitigation

A Theory of Totally Self-Checking System Design

Survey and future directions of fault-tolerant distributed computing on board spacecraft

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