Application Specific Processor Design for H.264 Decoder with a Configurable Embedded Processor

Abstract

An application specific processor for an H.264 decoder with a configurable embedded processor is designed in this research. The motion compensation, inverse integer transform, inverse quantization, and entropy decoding algorithm of H.264 decoder software are optimized. We improved the performance of the processor with instruction‐level hardware optimization, which is tailored to configurable embedded processor architecture. The optimized instructions for video processing can be used in other video compression standards such as MPEG 1, 2, and 4. A significant performance improvement is achieved with high flexibility. Experimental results show that we could achieve 300% performance for the H.264 baseline profile level 2 decoder.

Designing of a AMBA-AHB Multilayer Bus matrix SelfMotivated Arbitration scheme

“…This assumption should be valid because the system developer generally recog-nizes the features of the target applications [15]. For example, some masters in embedded systems are required to complete their job for given timing constraints, resulting in the satisfac-tion of system-level timing constraints.…”

A Novel High Performance Architecture for H.264/AVC Deblocking Filtering

“…Finally, the first three columns of 4×4 blocks of the current MB (0, 1, 2, 4, 5, 6, and so on), the top neighbors (T1, T2, and so on), and the right column of the previous MB (3,7,11,15, and so on) are transferred to the external bulk memory. As the MBs are processed in lexicographical order, the right columns (blocks 3, 7, 11, 15, 17, 19, 21, and 23) are stored in the RAM neighbor module to be used as left neighbors (L1 to L8) in the filtering of the next MB.…”

“…After the luminance pixels are processed, the chrominance pixels are similarly processed. Finally, the first three columns of 4×4 blocks of the current MB (0, 1, 2, 4, 5, 6, and so on), the top neighbors (T1, T2, and so on), and the right column of the previous MB (3,7,11,15, and so on) are transferred to the external bulk memory. These last blocks have been saved in the temporal buffer and come from the right column data path after the horizontal filtering, as shown in Fig.…”

“…In particular, the adaptive deblocking filter defined by the H.264/AVC standard greatly contributes to reducing the presence of annoying blocking artefacts in the decoded video sequence, providing up to an average of 10% transmission bitrate savings [1]. However, these favorable features are obtained through a highly adaptive and computationally intensive process stated by the H.264/AVC standard, which represents a significant percentage of the whole processing effort carried out by a standard-based decoder [2], [3]. These demanding characteristics become even more stringent for high definition video applications, where high temporal rates and large frame dimensions are usual, making the design of efficient deblocking filtering architectures a critical issue in order to achieve real-time performance.…”

Design of High-Speed CAVLC Decoder Architecture for H.264/AVC

“…The latest international video coding standard, H.264, has been developed by the Video Coding Expert Group of ITU-T and the Moving Picture Experts Group of ISO/IEC. It uses contextadaptive variable length coding (CAVLC) for entropy coding, which is used to encode the quantized transform coefficients [1], [2]. In the CAVLC decoder, each syntax element of five steps is sequentially decoded using the compressed bitstreams and parameters, and the residual block is formed using the decoded syntax elements.…”