Application of scanning capacitance microscopy on SOI wafer in die-level failure analysis

Hong, Seah Pei; Hua, Zheng Xin; Chung, Chng Kheaw; Chin, Aaron

doi:10.1109/ipfa.2014.6898163

Cited by 2 publications

(1 citation statement)

References 3 publications

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“…Scanning capacitance microscopy (SCM) is one of the most commonly used techniques for dopant profiling in the semiconductor industry [1][2][3][4]. SCM uses a metalized probe tip to bias the semiconductor in the depletion mode and to measure the differential capacitance between the probe and the semiconductor material as a function of the bias voltage [5][6][7][8][9] (see Fig. 1).…”

Section: Introductionmentioning

confidence: 99%

Untitled

2016

Adv. Electr. Comp. Eng.

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In this article we investigate the possibility to use scanning capacitance microscopy (SCM) for the 2-D and 3-D "atomistic" dopant profiling of semiconductor materials. For this purpose, we first analyze the effects of random dopant fluctuations (RDF) on SCM measurements with nanoscale probes and show that the discrete and random locations of dopant impurities significantly affect the differential capacitance measured in SCM experiments if the dimension of the probe is below 50 nm. Then, we present an algorithm to compute the x, y, and z coordinates of the ionized impurities in the semiconductor material using a set of SCM measurements. The algorithm is based on evaluating the doping sensitivity functions of the differential capacitance and uses a gradientbased iterative method to compute the locations of dopants. Finally, we discuss a standard simulation case and show that we are able to successfully retrieve the locations of the ionized impurities using the proposed algorithm.

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