Annealing characteristics of boron- and phosphorus-implanted polycrystalline silicon

Seto, John Y. W.

doi:10.1063/1.322588

Cited by 16 publications

(2 citation statements)

References 10 publications

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“…On the contrary, concerning thin poly Si film, only the dependence of poly Si diameter on the growth conditions (6) and the crystalline state dependence of poly Si resistivity (7) have been reported. The impurity doping effect of grain growth or the growth mechanism itself have yet to be clarified.…”

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confidence: 99%

Grain Growth Mechanism of Heavily Phosphorus‐Implanted Polycrystalline Silicon

Wada

Nishimatsu

1978

J. Electrochem. Soc.

263

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Grain growth phenomena of heavily phosphorus-implanted polycrystalline silicon films owing to high temperature annealing are investigated by transmission electron microscope. Phosphorus doping in excess of 4 • 1020 cm -~ is found to enhance grain growth. This growth is broken down into primary and secondary recrystallization. Isochronal annealing reveals the activation energies for these as 2.4 and 1.0 eV, respectively. The driving force of the primary recrystallization is found to be the interface energy. Therefore, the elementary process behind the primary, recrystallization is attributed to silicon diffusion across the grain boundary region.

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mentioning

confidence: 99%

Grain Growth Mechanism of Heavily Phosphorus‐Implanted Polycrystalline Silicon

Wada

Nishimatsu

1978

J. Electrochem. Soc.

263

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“…This rapid increase in electrical conductance can be attributed to the enlargement of the grain size in the poly-Si. It is noteworthy that the temperature range that enables dopant activation is overlapped with that needed to trigger the growth in grain size 31 . However, based on transmission electron microscope (TEM) inspection, there was no perceivable change in the grain size below and above the transition point ( Figure S2 ).…”

Section: Resultsmentioning

confidence: 99%

Controllable electrical and physical breakdown of poly-crystalline silicon nanowires by thermally assisted electromigration

Park

Moon

Seol

et al. 2016

Sci Rep

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The importance of poly-crystalline silicon (poly-Si) in semiconductor manufacturing is rapidly increasing due to its highly controllable conductivity and excellent, uniform deposition quality. With the continuing miniaturization of electronic components, low dimensional structures such as 1-dimensional nanowires (NWs) have attracted a great deal of attention. But such components have a much higher current density than 2- or 3- dimensional films, and high current can degrade device lifetime and lead to breakdown problems. Here, we report on the electrical and thermal characteristics of poly-Si NWs, which can also be used to control electrical and physical breakdown under high current density. This work reports a controllable catastrophic change of poly-Si NWs by thermally-assisted electromigration and underlying mechanisms. It also reports the direct and real time observation of these catastrophic changes of poly-Si nanowires for the first time, using scanning electron microscopy.

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Fabrication of polycrystalline silicon thin‐film transistors by ion shower doping technique

Hirano

Setsune

Yoshida

et al. 1988

Electron Comm Jpn Pt II

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In the fabrications of polycrystalline silicon thin‐film transistors (TFTs), doping of impurities is often carried out by ion implantation. In this study, dopings of phosphorus and boron were carried out by an ion shower doping technique, where the rf plasma of H2‐diluted PH3 or H2‐diluted B2H6 gas with a magnetic field was used for the ion source. To form the source‐drain regions using this technique, the doping characteristics such as sheet resistivity and impurity profiles in polycrystalline Si were investigated. Using the conditions obtained experimentally, n and p channel Si gate polycrystalline Si TFTs were fabricated on a fused silica substrate by using a CMOS process. It was also confirmed that the conventional photoresist can be used for this process. For the n‐channel transistor, field‐effect mobility μ = 3 cm2/V·s, threshold voltage Vth = 5 V, and on‐off current ratio ION (VD = 6 V, VG = 10 V)/IOFF (VD = 6 V, VG = 0 V) ≌ 106 were obtained for W/L = 12 μm/6 μm. In the p‐channel transistor, the characteristics were similar to those obtained by ion implantation. The ion shower doping technique made it possible to fabricate polycrystalline Si TFTs with a CMOS structure, using a simple apparatus. By using this technique, a large area process will be possible.

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Annealing characteristics of boron- and phosphorus-implanted polycrystalline silicon

Cited by 16 publications

References 10 publications

Grain Growth Mechanism of Heavily Phosphorus‐Implanted Polycrystalline Silicon

Grain Growth Mechanism of Heavily Phosphorus‐Implanted Polycrystalline Silicon

Controllable electrical and physical breakdown of poly-crystalline silicon nanowires by thermally assisted electromigration

Fabrication of polycrystalline silicon thin‐film transistors by ion shower doping technique

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