Analyzing the Impact of Intermittent Faults on Microprocessors Applying Fault Injection

Gil-Tomás, Daniel; Gracia-Morán, Joaquín; Calvo, Juan Carlos; Saiz-Adalid, Luis-J.; Gil-Vicente, Pedro-J.

doi:10.1109/mdt.2011.2179514

Cited by 17 publications

(16 citation statements)

References 6 publications

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“…Present work completes the results presented in [18], [21], where the behavior of an 8051 microcontroller under the influence of intermittent faults is analyzed. Comparing these works with the results presented in this paper, both cores show Failures similar general trends, although some differences have been observed.…”

Section: Related Worksupporting

confidence: 66%

“…These fault models are defined at logic and register transfer (RT) abstraction levels. More information can be found in [18], [21].…”

Section: Fault Injection Environmentmentioning

confidence: 99%

“…Simulation-based Fault Injection has proven to be a good technique to study the impact of intermittent faults [17], [18], [19], [20]. It is a useful experimental way to evaluate the dependability of a system during the design phase.…”

Section: Introductionmentioning

confidence: 99%

“…To carry out the fault injection experiments, we have used VHDL-based Fault Injection due to its flexibility, as well as the high observability and controllability of the model components [16]. This paper complements previous works published by the authors [18], [21], where the impact of intermittent faults on a commercial CISC microcontroller was analyzed.…”

Section: Introductionmentioning

confidence: 99%

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Effects of Intermittent Faults on the Reliability of a Reduced Instruction Set Computing (RISC) Microprocessor

et al. 2014

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Gracia-Morán, J.; Baraza Calvo, JC.; Gil Tomás, DA.; Saiz-Adalid, L.; Gil, P. (2014 > REPLACE THIS LINE WITH YOUR PAPER IDENTIFICATION NUMBER (DOUBLE-CLICK HERE TO EDIT) < 1Abstract-With the scaling of CMOS technology to the submicron range, designers have to deal with a growing number and variety of fault types. In this way, intermittent faults are gaining importance in modern VLSI circuits. The presence of these faults is increasing due to the complexity of manufacturing processes (which produce residues and parameter variations), together with special aging mechanisms. This work presents a case study of the impact of intermittent faults on the behavior of a RISC microprocessor. We have carried out an exhaustive reliability assessment by using VHDL-based fault injection. In this way, we have been able to modify different intermittent fault parameters, to select various targets, and even, to compare the impact of intermittent faults with those induced by transient and permanent faults.

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Section: Related Worksupporting

confidence: 66%

“…These fault models are defined at logic and register transfer (RT) abstraction levels. More information can be found in [18], [21].…”

Section: Fault Injection Environmentmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

Effects of Intermittent Faults on the Reliability of a Reduced Instruction Set Computing (RISC) Microprocessor

et al. 2014

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“…In former works, we have studied the impact of intermittent faults in different microprocessors (with both complex instruction set computing (CISC) and reduced instruction set computing (RISC) architectures) at gate and register-transfer abstraction levels [6], [7], [8]. From the analysis of real logged faults and the study of the physical mechanisms involved, we have generated new fault models for intermittent faults.…”

mentioning

confidence: 99%

Injecting Intermittent Faults for the Dependability Assessment of a Fault-Tolerant Microcomputer System

et al. 2016

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Abstract-As scaling is more and more aggressive, intermittent faults are increasing their importance in current deep submicron complementary metal-oxide-semiconductor (CMOS) technologies. This work shows the dependability assessment of a fault-tolerant computer system against intermittent faults. The applied methodology lies in VHDL-Based Fault Injection, which allows the assessment in early design phases, together with a high level of observability and controllability. The evaluated system is a duplex microcontroller system with cold stand-by sparing. A wide set of intermittent fault models have been injected, and from the simulation traces, coverages and latencies have been measured. Markov models for this system have been generated and some dependability functions, such as reliability and safety, have been calculated. From these results, some enhancements of detection and recovery mechanisms have been suggested. The methodology presented is general to any fault-tolerant computer system. Index Terms-

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An LSTM-based severity evaluation method for intermittent open faults of an electrical connector under a shock test

Shi

Wang

2021

Measurement

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Analyzing the Impact of Intermittent Faults on Microprocessors Applying Fault Injection

Cited by 17 publications

References 6 publications

Effects of Intermittent Faults on the Reliability of a Reduced Instruction Set Computing (RISC) Microprocessor

Effects of Intermittent Faults on the Reliability of a Reduced Instruction Set Computing (RISC) Microprocessor

Injecting Intermittent Faults for the Dependability Assessment of a Fault-Tolerant Microcomputer System

An LSTM-based severity evaluation method for intermittent open faults of an electrical connector under a shock test

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