Analytical evaluation of scattering parameters for equivalent circuit of through silicon via array

Abstract

The high level of integration in digital electronic chips based on threedimensional (3D) technology requires accurate modelling of the vertical interconnects (the through silicon vias -TSVs). An accurate prediction of the signal propagation and crosstalk of the TSVs cannot be based on the single via since the interaction among adjacent TSVs in a high density array cannot be neglected. An algorithm is proposed that extends the approach for modelling a TSV array with a complete analytical evaluation of the final multiport scattering parameter matrix, thus making the electromagnetic modelling of such structures more efficient without relying on commercial circuit solvers. The proposed method requires much less processing time with respect to commercial solvers with a comparable accuracy.Introduction: In the recently developed integrated circuits (ICs), through silicon vias (TSVs) are used to vertically interconnect the stacked chips when using 3D technology. Moreover, the increasing bandwidth of digital signals forces the IC passive interconnects as well as the TSVs to ensure a good quality of the propagating signals.To achieve such integrated devices to work properly, an exhaustive analysis is necessary for the TSV characterisation and design; this analysis can be based on efficient equivalent circuits or on time consuming full wave solvers. The high density of vertical interconnects in a TSV array [1, 2], as well as nonlinear effects such as depletion capacitance [2, 3], makes the equivalent circuit the most feasible method able to combine a large circuit model with limited computational time. The use of full wave solvers is necessary for investigating the physic phenomena of the TSV electromagnetic field propagation, as well as for identifying the topology of the equivalent circuit; however, they become impracticable for the analysis of a large problem such as a TSV array. Closed-form expressions are developed [1, 4] to obtain accurate values for the self and coupling R, L, G, C parameters of the TSV array. In [1], a method for developing an equivalent circuit for a large TSV array is presented, where the model complexity is reduced by combining the effect of the return ('ground') TSVs. Thus, the final S-parameter matrix consists of just the signal TSVs. However, the reduced RLGC matrices are combined within a commercial circuit simulator for achieving the final S-parameters. This work is based on [1] up to the analytical definition of the reduced impedance (for resistance R and inductance L) and admittance (for conductance G and capacitance C) matrices; then it extends that work to analytically evaluate the final multi-port S-parameter matrix of the coupled signal TSVs of the array, similar to [5], thus without relying on any simulator throughout the modelling procedure.

Modeling and Electromagnetic Analysis of Multilayer Through Silicon Via Interconnect for 3D Integration

“…That means the capacitance is correlated with the height, pitch, and the radius of the research objects. Therefore, the capacitance between two TSVs in the substrate, si , can be calculated in (8). Meanwhile, the capacitance between two bumps in the underfill layer, underfill , can be derived in (9) and the capacitance between TSV and silicon substrate, OX , can be calculated in (10): .…”

“…Analytical formulas to extract an equivalent circuit model for coupled TSVs have been proposed in [6] where the authors used multiconductor transmission line approach to model the structures. References [7,8] presented new analytical methods to derive the , , , and parameters in multiport TSV networks.…”

Characterization and modeling of on-chip via stacks for RF-CMOS applications

“…In the design of integrated circuits (ICs) for RF applications, vias are generally still considered as RC elements [1,2,3,4]. However, as the operation frequency of ICs increases, the inductive behavior of on-silicon vias (OSV) and vertical interconnections must be considered as in the case of PCB, RDL, and TSV technologies [5,6,7,8,9,10]. The previously performed analyses reported in [11,12] included the characterization of the electromagnetic behavior of via arrays and stacks; in this case, however, the results were obtained only through full-wave simulations.…”