Analytical drain current model for symmetric dual-gate amorphous indium gallium zinc oxide thin-film transistors

Qin, Ting; Liao, Congwei; Huang, Shengxiang; Tian-Bao, Yu; Deng, Lianwen

doi:10.7567/jjap.57.014301

Cited by 9 publications

(3 citation statements)

References 35 publications

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“…As the extreme scaling process continues, CMOS technology with conventional MOSFET encounters various challenges such as the increasing leakage current and subthreshold slope (SS). Tunnel field-effect transistor (TFET), which utilizes the band-to-band tunneling (BTBT) mechanisms, is expected to extend the limitations of leakage current and SS [1][2][3][4][5][6][7][8]. Silicon-based TFET shows advantages such as high reliability and low cost.…”

Section: Introductionmentioning

confidence: 99%

Simulation Study of the Double-Gate Tunnel Field-Effect Transistor with Step Channel Thickness

et al. 2020

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Double-gate tunnel field-effect transistor (DG TFET) is expected to extend the limitations of leakage current and subthreshold slope. However, it also suffers from the ambipolar behavior with the symmetrical source/drain architecture. To overcome the ambipolar current, asymmetry must be introduced between the source and drain. In this paper, we investigate the performances of DG TFET with step channel thickness (SC TFET) by utilizing the 2D simulation. The asymmetry between source and drain is introduced through the step channel thickness; hence, the ambipolar behavior is expected to be relieved. The results show that the SC TFET exhibits significant reduction of ambipolar current compared with the conventional DG TFET. The mechanisms of SC TFET are thoroughly discussed to explore the physical insight. The impacts introduced by the structure parameters on onset voltage, subthreshold slope, drain current in on-state and ambipolar-state are also exhibited in determining the optimal structure.

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Section: Introductionmentioning

confidence: 99%

Simulation Study of the Double-Gate Tunnel Field-Effect Transistor with Step Channel Thickness

et al. 2020

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“…Active-matrix organic light-emitting diode (AMOLED) displays have an important presence in mainstream next-generation displays due their extremely high contrast ratio, fast electrical-optical response, and excellent compatibility with flexible electronics [1,2]. Although different AMOLED backplane solutions have been discussed over the past decades [3,4], for state-of-the-art AMOLED displays, low-temperature poly-silicon thin-film transistors (LTPS TFTs) show better performance. Compared with other types of TFTs, LTPS TFTs exhibit higher mobility and better stability in terms of electrical characteristics [5,6].…”

Section: Introductionmentioning

confidence: 99%

An AMOLED Pixel Circuit Based on LTPS Thin-film Transistors with Mono-Type Scanning Driving

Deng

Zhen

et al. 2020

Electronics

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Using low-temperature poly-silicon thin-film transistors (LTPS TFTs) as a basis, a pixel circuit for an active matrix organic light-emitting diode (AMOLED) with narrow bezel displays was developed. The pixel circuit features mono-type scanning signals, elimination of static power lines, and pixel-integrated emitting control functions. Therefore, gate driver circuits of the display bezel can be simplified efficiently. In addition, the pixel circuit has a high-resolution design due to an increase of the pulse width of the scan signal to extend the threshold voltage and internal–resistance drop (IR drop) detection period. Further, regarding the influences of process–voltage–temperature (PVT) variation in the pixel circuit, comparison investigations were carried out with the proposed circuit and other pixel circuits with mono-type scanning signals using Monte Carlo analysis. The feasibility of the proposed pixel circuit is well demonstrated, as the current variations can be reduced to 2.1% for the supplied power reduced from 5 V to 3 V due to IR drop, and the current variation is as low as 10.6% with operating temperatures from –40 degrees to 85 degrees.

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“…Dual-gate InGaZnO TFTs render circuit response fast and power consumption low. [6][7][8] Previous researches show that the threshold voltage of the driving transistor can be adjusted dynamically by discharging the auxiliary gate, which benefits good compensation effect for active matrix organic light emitting diode (AMOLED) displays. [9] In the case of system-on-panel circuit integrations, it was proposed that high voltage-gain amplifiers be replaced by the dual-gate InGaZnO TFTs with differential inputs.…”

Section: Introductionmentioning

confidence: 99%

Surface potential-based analytical model for InGaZnO thin-film transistors with independent dual-gates*

He¹,

Deng²,

Qin³

et al. 2020

Chinese Phys. B

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An analytical drain current model on the basis of the surface potential is proposed for indium–gallium zinc oxide (InGaZnO) thin-film transistors (TFTs) with an independent dual-gate (IDG) structure. For a unified expression of carriers’ distribution for the sub-threshold region and the conduction region, the concept of equivalent flat-band voltage and the Lambert W function are introduced to solve the Poisson equation, and to derive the potential distribution of the active layer. In addition, the regional integration approach is used to develop a compact analytical current–voltage model. Although only two fitting parameters are required, a good agreement is obtained between the calculated results by the proposed model and the simulation results by TCAD. The proposed current–voltage model is then implemented by using Verilog-A for SPICE simulations of a dual-gate InGaZnO TFT integrated inverter circuit.

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Analytical drain current model for symmetric dual-gate amorphous indium gallium zinc oxide thin-film transistors

Cited by 9 publications

References 35 publications

Simulation Study of the Double-Gate Tunnel Field-Effect Transistor with Step Channel Thickness

Simulation Study of the Double-Gate Tunnel Field-Effect Transistor with Step Channel Thickness

An AMOLED Pixel Circuit Based on LTPS Thin-film Transistors with Mono-Type Scanning Driving

Surface potential-based analytical model for InGaZnO thin-film transistors with independent dual-gates*

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