Analytical Approach for Enhancement of n-Channel Metal–Oxide–Semiconductor Field-Effect Transistor Performance with Carbon-Doped Source/Drain Formed by Molecular Carbon Ion Implantation and Laser Annealing

Abstract

Enhancement of n-channel metal–oxide–semiconductor field-effect transistor (nMOSFET) performance with a carbon-doped source/drain (Si:C-S/D) was approached analytically for the first time. Si:C-S/D was formed by molecular carbon (C7H x ) ion implantation and laser annealing. C7H x implantation forms a smooth interface between Si:C layers and Si substrates, and laser annealing also achieves a high carbon concentration of substitution. The channel strain with Si:C-S/D was successfully measured by UV Raman spectroscopy using a particular test pattern. The thick Si:C-S/D layer and the high carbon concentration of substitution produce a large strain at the channel region. It was confirmed that the performance of nMOSFETs is effectively improved by strained Si:C-S/D. These analytical approaches are quite valuable for promoting the development of strained nMOSFETs with Si:C-S/D.

Challenges to Strained Source/Drain and Advanced Silicide for High Performance Transistors

“…Si:C-S/D is one of the most attractive booster items for nFET, and the method of the Si:C-S/D formation using a combination of molecular carbon ion (C 7 H x ) implantation and non-melt LA has been investigated [1][2]. Figure 2 shows the process flow of Si:C-S/D using the SPE technique.…”

“…Then, LA is conducted for SPE and the activation of Si:C-S/D. In order to effectively develop Si:C-S/D, a measurement of the channel stress by UV Raman spectroscopy using a particular test pattern was established [2]. Figure 3 shows the structure of the test pattern and the resultant Raman peak shift at channel regions with Si:C-S/D using two C 7 H x -implantaion conditions.…”

Si:C-S/D Engineering using Cascade C₇H_x Implantation Followed by Rapid Solid-Phase Epitaxy and Laser Annealing for nMOSFET with Highly-Strained and Low-Resistive S/D

“…In our previous work, we reported that high stress Si:C-S/D with high carbon concentration of substitution (C Si:C ) formed by molecular carbon ion (C 7 H x ) implantation and solid-phase epitaxy (SPE) using non-melt laser annealing (LA) produces the large channel strain. It was also found that the combination of rapid thermal annealing (RTA) and LA in order to reduce the parasitic resistance of transistors relaxes the strain in Si:C layers [4]. The retrograde C profile with low temperature SPE has been also proposed as a countermeasure [5].…”

“…Various RTA conditions before LA at 1200 °C were examined for SPE and activation. The stress at the channel region was measured by UV Raman spectroscopy using the particular Raman-test pattern [4]. The measurement of R s in Si:C layers was performed by four-point probe (4PP) method.…”

Analysis of Channel Stress Induced by NiPt-silicide and Its Generation Mechanism

“…Consequently, we propose the generation mechanism of channel-stress. Figure 1 shows the test structure [3]. The stress at the channel region was measured by UV Raman spectroscopy using these structures.…”