Challenges to Strained Source/Drain and Advanced Silicide for High Performance Transistors

Yamaguchi, Tadashi

doi:10.7567/ssdm.2011.e-4-1

Cited by 2 publications

(3 citation statements)

References 2 publications

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“…[1][2][3] In particular, Pt-doped Ni (NiPt) silicide has been widely used in state-of-the-art CMOS because of its ability to suppress the agglomeration of silicide during thermal process. [4][5][6][7][8][9][10] It has been reported that a reduction in free energy due to the incorporation of Pt into NiSi suppresses agglomeration. 11) Furthermore, the effects of additional Pt in Ni silicide on microstructure, such as axiotaxy and epitaxial growth, and thermal stability have also been reported.…”

Section: Introductionmentioning

confidence: 99%

NiPt silicide agglomeration accompanied by stress relaxation in NiSi(010) ∥ Si(001) grains

Mizuo¹,

Yamaguchi²,

Pagès³

et al. 2015

Jpn. J. Appl. Phys.

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Pt-doped Ni (NiPt) silicide agglomeration in terms of NiSi crystal orientation, Pt segregation at the NiSi/Si interface, and residual stress is studied for the first time. In the annealing of Ni monosilicide (NiSi), the growth of NiSi grains whose NiSi b-axes are aligned normal to Si(001) [NiSi(010) k Si(001)] with increasing Pt segregation at the NiSi/Si interface owing to a high annealing temperature was observed. The residual stress in NiSi(010) k Si(001) grains also increases with increasing annealing temperature. Furthermore, the recrystallization of NiSi(010) k Si(001) grains with increasing residual stress continues through additional annealing after NiSi formation. After the annealing of NiSi(010) k Si(001) grains with their strain at approximately 2%, the start of NiPt silicide agglomerates accompanied by stress relaxation was observed. This preferential recrystallization of NiSi(010) k Si(001) grains with increasing residual stress is considered to enhance the NiPt silicide agglomeration.

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Section: Introductionmentioning

confidence: 99%

NiPt silicide agglomeration accompanied by stress relaxation in NiSi(010) ∥ Si(001) grains

Mizuo¹,

Yamaguchi²,

Pagès³

et al. 2015

Jpn. J. Appl. Phys.

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“…To investigate the effect of the annealing temperature, NiPt silicide films with LA and MWA in the second silicide annealing were also prepared. 8,19,25,26) The crystalline microstructure of the Ni silicide films was analyzed using in-plane XRD analysis with a Cu K¡ source at a 0.4°incident angle. LAADF-STEM was performed to analyze the grain sizes of the films after the first annealing and second annealing.…”

Section: Methodsmentioning

confidence: 99%

“…2,3) The use of Pt-added Ni silicide (NiPt silicide) leads to improvement in MOS performance by suppressing the increase in sheet resistance and junction leakage current owing to the retardation of the phase transition to Ni disilicide. [4][5][6][7][8][9][10] Also, NiPt silicide films have residual stress, which is caused by the mismatch between the coefficients of thermal expansion (CTEs) of Ni silicide and Si during Ni silicide formation. [11][12][13][14][15][16][17][18][19] Therefore, the effect of the Ni silicide process on the channel stress of CMOS transistors is a crucial topic of research, because PMOS and NMOS require compressive and tensile stresses, respectively, in their channel regions to improve transistor performance.…”

Section: Introductionmentioning

confidence: 99%

Impact of additional Pt and NiSi crystal orientation on channel stress induced by Ni silicide film in metal–oxide–semiconductor field-effect transistors

Mizuo

Yamaguchi

Kudo

et al. 2014

Jpn. J. Appl. Phys.

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The impact of additional Pt and Ni monosilicide (NiSi) crystal orientation on channel stress from Ni silicide in metal–oxide–semiconductor field-effect transistors (MOSFETs) has been demonstrated. The channel stress generation mechanism can be explained by the NiSi crystal orientation. In pure Ni silicide films, the channel stress in the p-type substrate is much larger than that in the n-type one, since the NiSi a-axis parallel to the channel direction is strongly aligned on the p-type substrate compared with on the n-type one. On the other hand, in NiPt silicide films, the difference in the channel stress between the p- and n-type substrates is small, because the NiSi crystal orientation on the p-type substrate is similar to that on the n-type one. These results can be explained by the Pt segregation at the interface between the NiSi film and the Si surface. Segregated Pt atoms cause the NiSi b-axis to align normal to the Si(001) surface in the nucleation step owing to the expansion of the NiSi lattice spacing at the NiSi/Si interface. Furthermore, the Pt segregation mechanism is considered to be caused by the grain boundary diffusion in the Ni2Si film during NiSi formation. We confirmed that the grains of Ni2Si on the p-type substrate are smaller than those on the n-type one. The Ni2Si film on the p-type substrate has more grain boundary diffusion paths than that on the n-type one. Therefore, the amount of Pt segregation at the NiSi/Si interface on the p-type substrate is larger than that on the n-type one. Consequently, the number of NiSi grains with the b-axis aligned normal to the Si(001) in the p-type substrate is larger than that in the n-type one. As a result, the channel stress induced by NiPt silicide in PMOS is larger than that in NMOS. According to this mechanism, controlling the Pt concentration at the NiSi/Si interface is one of the key factors for channel stress engineering.

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Challenges to Strained Source/Drain and Advanced Silicide for High Performance Transistors

Cited by 2 publications

References 2 publications

NiPt silicide agglomeration accompanied by stress relaxation in NiSi(010) ∥ Si(001) grains

NiPt silicide agglomeration accompanied by stress relaxation in NiSi(010) ∥ Si(001) grains

Impact of additional Pt and NiSi crystal orientation on channel stress induced by Ni silicide film in metal–oxide–semiconductor field-effect transistors

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