Analysis of Sheet Dimension (W, L) Dependence of NBTI in GAA-SNS FETs

Choudhury, Nilotpal; Samadder, Tarun; Tiwari, Ravi; Zhou, Huimei; Southwick, Richard G.; Wang, Miaomiao; Mahapatra, S.

doi:10.1109/irps46558.2021.9405137

Cited by 7 publications

(3 citation statements)

References 17 publications

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“…Slightly degraded NBTI reliability at a narrower Wsheet is reported in NS devices fabricated on (100) substrate [10,14,24], which can be attributed to a higher contribution from (100) surface orientation and higher compressive strain at a wider Wsheet [24]. HCI reliability's dependence on Wsheet in NS is influenced by two competing mechanisms that have conflicting effects.…”

Section: Impact Of Wsheet On Reliabilitymentioning

confidence: 99%

“…Recently, there has been a surge in publications exploring device reliability in NS [22][23][24][25][36][37][38][39][44][45][46]. The consensus across these studies is that the majority of the fundamental degradation mechanisms in NS devices, such as BTI, HCI, Gate oxide TDDB, and PC to CA TDDB, are similar to those in FinFET and planar devices, and governed by the same underlying physics and kinetics.…”

Section: Transistor Reliability Mechanisms In Gate-all-around Nanosheetsmentioning

confidence: 99%

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A Review of Reliability in Gate-All-Around Nanosheet Devices

Wang

2024

Micromachines

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The gate-all-around (GAA) nanosheet (NS) field-effect-transistor (FET) is poised to replace FinFET in the 3 nm CMOS technology node and beyond, marking the second seminal shift in device architecture across the extensive 60-plus-year history of MOSFET. The introduction of a new device structure, coupled with aggressive pitch scaling, can give rise to reliability challenges. In this article, we present a review of the key reliability mechanisms in GAA NS FET, including bias temperature instability (BTI), hot carrier injection (HCI), gate oxide (Gox) time-dependent dielectric breakdown (TDDB), and middle-of-line (MOL) TDDB. We aim to not only underscore the unique reliability attributes inherent to NS architecture but also provide a holistic view of the status and prospects of NS reliability, taking into account the challenges posed by future scaling.

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Section: Impact Of Wsheet On Reliabilitymentioning

confidence: 99%

Section: Transistor Reliability Mechanisms In Gate-all-around Nanosheetsmentioning

confidence: 99%

A Review of Reliability in Gate-All-Around Nanosheet Devices

Wang

2024

Micromachines

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“…These phenomena lead to malfunction in circuits. From BTI to BEOL TDDB, there are numerous studies for their impact on device, circuit, and system performance and reliability [11][12][13][14][15][16][17][18][19][20][21][22][23][24][25][26][27][28][29][30], but they are not the topic discussed here. In this paper, our attention is focused on recent progress in physics-based modeling of EM in on-chip interconnects.…”

Section: Introductionmentioning

confidence: 99%

Recent Progress in Physics-Based Modeling of Electromigration in Integrated Circuit Interconnects

2022

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The advance of semiconductor technology not only enables integrated circuits with higher density and better performance but also increases their vulnerability to various aging mechanisms which occur from front-end to back-end. Analysis on the impact of aging mechanisms on circuits’ reliability is crucial for the design of reliable and sustainable electronic systems at advanced technology nodes. As one of the most crucial back-end aging mechanisms, electromigration deserves research efforts. This paper introduces recent studies on physics-based modeling of electromigration aging of on-chip interconnects. At first, the background of electromigration is introduced. The conventional method and physics-based modeling for electromigration are described. Then studies on how electromigration affects powers grids and signal interconnects are discussed in detail. Some of them focus on the comprehensiveness of modeling methodology, while others aim at the strategies for improving computation accuracy and speed and the strategies for accelerating/decelerating aging. Considering the importance of electromigration for circuit reliability, this paper is dedicated to providing a review on physics-based modeling methodologies on electromigration and their applications for integrated circuits interconnects.

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Decoupling of NBTI and Pure HCD Contributions in p-GAA SNS FETs Under Mixed V_G/V_D Stress

Choudhury

Ranjan

Mahapatra

2022

2022 IEEE International Reliability Physics Symposium (IRPS)

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Analysis of Sheet Dimension (W, L) Dependence of NBTI in GAA-SNS FETs

Cited by 7 publications

References 17 publications

A Review of Reliability in Gate-All-Around Nanosheet Devices

A Review of Reliability in Gate-All-Around Nanosheet Devices

Recent Progress in Physics-Based Modeling of Electromigration in Integrated Circuit Interconnects

Decoupling of NBTI and Pure HCD Contributions in p-GAA SNS FETs Under Mixed V_G/V_D Stress

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Analysis of Sheet Dimension (W, L) Dependence of NBTI in GAA-SNS FETs

Cited by 7 publications

References 17 publications

A Review of Reliability in Gate-All-Around Nanosheet Devices

A Review of Reliability in Gate-All-Around Nanosheet Devices

Recent Progress in Physics-Based Modeling of Electromigration in Integrated Circuit Interconnects

Decoupling of NBTI and Pure HCD Contributions in p-GAA SNS FETs Under Mixed VG/VD Stress

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Decoupling of NBTI and Pure HCD Contributions in p-GAA SNS FETs Under Mixed V_G/V_D Stress