Analysis of Improved Performance Under Negative Bias Illumination Stress of Dual Gate Driving a- IGZO TFT by TCAD Simulation

Billah, Mohammad Masum; Chowdhury, Delwar Hossain; Mativenga, Mallory; Um, Jae Gwang; Mruthyunjaya, Ravi K.; Heiler, Gregory; Tredwell, T.J.; Jang, Jin

doi:10.1109/led.2016.2557358

Cited by 61 publications

(34 citation statements)

References 23 publications

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“…Thickness dependent numerical simulation was performed using Silvaco TCAD. [11] which is listed in Table 1, showing a good match between experiment data and simulation results. DG-driving TFTs exhibit better threshold voltage stability (V Th ~ 0 V), steep subthreshold swing (SS), ~5 times and ~2 times larger I D in conventional overlap DG TFT and 2μm offset-gate DG TFT, respectively than the SG-driving TFT which might be originated from carrier accumulation in the back channel region due to high secondary gate bias during DGdriving [11].…”

Section: Methodsmentioning

confidence: 63%

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P‐76: Effect of a‐IGZO Thickness Variation on Device Uniformity and Drain Currents for Dual and Single Gate Driving TFTs

Billah

Hasan

Jeong

et al. 2017

Symp Digest of Tech Papers

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We studied the effect of a‐IGZO thickness (tIGZO) on device uniformity and drain current (ID) of a‐IGZO thin‐film‐transistors (TFTs) driven by the single gate (SG) and dual‐gate driving (DG‐driving). Numerical simulation using fitting density‐of‐states (DOS) exhibits ~5 times larger ID and excellent uniformity with DG‐driving TFTs for a‐IGZO tIGZO<20 nm than SG‐TFT and enables the opportunity of high yield backplanes using DG‐TFTs for next generation high‐performance display applications.

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Section: Methodsmentioning

confidence: 63%

“…In this work, TCAD simulation is implemented to characterize the performance variation of a-IGZO TFTs having a single gate (SG) and DG structure under DG-driving technique as a function of t IGZO using the density of states (DOS) model [11]. A comparison between experimental results was performed with TCAD simulation data.…”

Section: Introductionmentioning

confidence: 99%

P‐76: Effect of a‐IGZO Thickness Variation on Device Uniformity and Drain Currents for Dual and Single Gate Driving TFTs

Billah

Hasan

Jeong

et al. 2017

Symp Digest of Tech Papers

Self Cite

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“…We have validated our model using data from reference [1]. The values we used for the activation energies were based on observations and calculations from references [2][3][4][5][6].…”

Section: Validationmentioning

confidence: 99%

“…The initial concentrations of the 2 charge state oxygen interstitial and the neutral oxygen vacancy were chosen such that the simulation reproduced the initial (zero-stress) transfer curves. Figures 5 and 6 show the simulated transfer curve shift due to stress, compared to the data from reference [1]. The stress condition is 20 V gate bias at room temperature, with illumination at a wavelength of 365nm and an intensity of 0.7e3 Watt/cm 2 .…”

Section: Validationmentioning

confidence: 99%

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P‐3: TCAD Modeling of Ion Transport for Simulation of Degradation in an Amorphous InGaZnO Thin Film Transistor

Kong¹,

Hylin²,

Kimpton³

et al. 2018

Symp Digest of Tech Papers

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Analysis of Carrier Transport in Quantum Dot/Metal‐Oxide Phototransistors via Light‐Mediated Interfacial Modeling

Park

Kim

Jang

et al. 2022

Advanced Optical Materials

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Quantum dot (QD) hybrid phototransistors based on high‐mobility channel semiconductors have attracted great interest due to their outstanding photonic characteristics with diverse and broadband optoelectronic functionalities. However, difficulties for precise control of electronic coupling between QD particles and lack of QD/semiconductor interface analysis have limited the use of these platforms into practical optoelectronic applications. Here, the authors report a new strategy to high‐performance phototransistors based on CdSe QD/amorphous oxide semiconductor heterostructures using trap‐reduced chelating chalcometallate surface ligands by optimizing the QD layer thickness and interface engineering to enhance photogenerated charge transfer properties. Furthermore, based on performance parameters extracted from experimental structure and electrical characteristics, Technology Computer‐Aided Design (TCAD) modeling reveals carrier flow between the QDs in the semiconductor layer in agreement with various spectroscopic data. These modeling results indicate that interface engineering of QD with chalcometallate ligand results in very efficient photo‐induced charge transfer characteristics. Thus, high‐performance chalcometallate ligand QD‐based phototransistors are successfully realized with enhanced responsivity (2.12 × 104 A W−1) and photodetectivity (2.74 × 1016 Jones) compared with conventional monodentate ligand functionalized (SCN−) QD‐based devices (8.79 × 103 A W−1 and 8.8 × 1010 Jones, respectively). This is the demonstration of systematic analysis of QD‐based hetero‐structured phototransistors with light‐mediated interfacial physical modeling and electrochemical measurement.

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Analysis of Improved Performance Under Negative Bias Illumination Stress of Dual Gate Driving a- IGZO TFT by TCAD Simulation

Cited by 61 publications

References 23 publications

P‐76: Effect of a‐IGZO Thickness Variation on Device Uniformity and Drain Currents for Dual and Single Gate Driving TFTs

P‐76: Effect of a‐IGZO Thickness Variation on Device Uniformity and Drain Currents for Dual and Single Gate Driving TFTs

P‐3: TCAD Modeling of Ion Transport for Simulation of Degradation in an Amorphous InGaZnO Thin Film Transistor

Analysis of Carrier Transport in Quantum Dot/Metal‐Oxide Phototransistors via Light‐Mediated Interfacial Modeling

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