Analysis of hole mobility and strain in a Si/Si_0.5Ge_0.5/Si metal oxide semiconductor field effect transistor

Abstract

The hole mobility has been measured in a metal-oxide semiconductor field-effect transistor featuring a 6 nm Si 0.5 Ge 0.5 conduction channel. Physical characterization and analysis of the electrical properties confirm that the channel is fully strained. At a total sheet carrier concentration, p s , of 10 12 cm −2 , the 300 K mobility of 220 cm 2 V −1 s −1 is double that of a Si control device (and at 4 K has a peak value of 1800 cm 2 V −1 s −1 ). This improvement is largely maintained up to p s ∼ 10 13 cm −2 , despite the onset of conduction in a parallel Si channel at the oxide interface. Comparing the measurements with calculations suggests that the mobility is affected more strongly by interface roughness than by alloy scattering.

Equilibrium strain-energy analysis of coherently strained core–shell nanowires

“…As mentioned before, distinct advantages can be gained in the carrier mobility of Si and Ge if strain can be added to the materials in the direction of current transport [14][15][16][17][18]. While this can be either the x-or the y-direction in the planar system, we consider it to be the z-direction in the core-shell system.…”

“…Tensile-strained silicon grown on a Si x Ge 1Àx layer has been shown to exhibit a sizeable electron mobility increase relative to bulk Si [14,15], and compressively strained Si x Ge 1Àx structures grown on a Si substrate have been shown to exhibit a higher hole mobility relative to bulk [16,17]. Similarly in nanowires, by judicious selection of the core and shell compositions as well as the thickness, it may be possible to engineer the strain state of a nanowire to achieve similar mobility increases.…”

Low-temperature RPCVD of Si, SiGe alloy, and Si1−yCy films on Si substrates using trisilane (Silcore®)

“…For future CMOS technologies (32 nm and beyond), Si epilayers, SiGe alloy layers [1,2], and Si 1Ày C y films [3,4], are intensely studied as possible source and drain or channel materials. A nondegrading and cost-effective integration of epitaxial layers using chemical vapor deposition requires low thermal budget and high growth rate, respectively.…”

Reduced pressure–chemical vapor deposition of high Ge content Si1−xGex and high C content Si1−yCy layers for advanced metal oxide semiconductor transistors

“…Because of the Ge (or C) content and of the compressive (or tensile strain), a type II band alignment occurs between Si and pseudomorphic Si 1Àx Ge x (Si 1Ày C y ), with a valence band offset (conduction band offset) of the order of 0.84x (6y) eV [1]. When capped with thin Si caps, high Ge content Si 1Àx Ge x layers (high C content Si 1Ày C y layers) thus act as efficient buried channels for the holes (for the electrons) in ptype MOSFETs [2][3][4] (n-type MOSFETs [5,6]). …”