Analysis and simulation of a fair queueing algorithm

Abstract

We discuss gateway queueing algorithms and their role in controlling congestion in datagram networks. A fair queueing aJgorithm, based on an earlier suggestion by Nagle, is proposed. An.alysis and simulations are used to compare this algorithm to other congestion control schemes. We find. that fair queueing provides several important advantages over the usual first-come-first-serve queueing algorithm: fair allocation of bandwidth, lower delay for sources using less than their full share of bandwidth, and protection from ill-behaved sources.

Matching output queueing with a combined input output queued switch

“…2 In this paper, we show that a CIOQ switch with a speedup of two can behave identically to an OQ switch. The result holds for switches with an arbitrary number of ports, and for any traffic 1. The need for a switch that can deliver a certain grade of service, irrespective of the applied traffic is particularly important given the number of recent studies that show how little we understand network traffic processes [11].…”

“…We believe that a well-designed network switch should perform predictably in the face of all types of arrival process 1 and allow the delay of individual packets to be controlled. Hence our approach is quite different: rather than find values of speedup that work well on average, or with simplistic and unrealistic traffic models, we find the minimum speedup such that a CIOQ switch behaves identically to an OQ switch for all types of traffic.…”

“…Furthermore, by carefully scheduling the time a packet is placed onto the outgoing line, a switch or router can control the packet's latency, and hence provide quality-of-service (QoS) guarantees. But output queueing is 1. This paper was presented at Infocom '99, New York, USA.…”

“…an output never idles so long as there is a cell destined for it in the system, and (b) allows the departure of cells to be scheduled to meet latency constraints. 1 We will require that any solution of the speedup problem possess these two desirable features; that is, a CIOQ switch must behave identically to an OQ switch in the following sense:…”

Analysis of a packet switch with memories running slower than the line-rate

“…Other service disciplines, such as WFQ [10], GPS [11], Virtual Clock [12], and DRR [13] are widely used to provide QoS guarantees. A characteristic of an OQ switch is that the buffer memory must be able to accept (write) new cells per time-slot where is the number of ports, and read one cell per cell time.…”