2018
DOI: 10.1109/led.2017.2778639
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Analysis and Modeling of Electroforming in Transition Metal Oxide-Based Memristors and Its Impact on Crossbar Array Density

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Cited by 12 publications
(7 citation statements)
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“…In addition, such transistors are generally large compared to the regular devices to accommodate these high forming voltages (Figure 1B). For example, for a 65 nm CMOS process (Beckmann et al, 2016;Amer et al, 2017a) used to prepare 80 nm × 80 nm memristor areas, the minimum length of the transistor used in the 1T1R cell could be as much as 0.5 μm to endure forming voltages up to 3.3 V. In contrast, the minimum length of the regular transistor used for peripheral circuitry is 60 nm with the nominal voltage 1.2 V or 1.0 V, depending on the process. Thus, researchers have focused on lowering the forming voltages to a level of operation that allows for better exploitation of memristive crossbar density (Govoreanu et al, 2011;Koveshnikov et al, 2012;Huang et al, 2013a;Chen, 2013;Kim et al, 2016;Amer et al, 2017c).…”
Section: Introductionmentioning
confidence: 99%
“…In addition, such transistors are generally large compared to the regular devices to accommodate these high forming voltages (Figure 1B). For example, for a 65 nm CMOS process (Beckmann et al, 2016;Amer et al, 2017a) used to prepare 80 nm × 80 nm memristor areas, the minimum length of the transistor used in the 1T1R cell could be as much as 0.5 μm to endure forming voltages up to 3.3 V. In contrast, the minimum length of the regular transistor used for peripheral circuitry is 60 nm with the nominal voltage 1.2 V or 1.0 V, depending on the process. Thus, researchers have focused on lowering the forming voltages to a level of operation that allows for better exploitation of memristive crossbar density (Govoreanu et al, 2011;Koveshnikov et al, 2012;Huang et al, 2013a;Chen, 2013;Kim et al, 2016;Amer et al, 2017c).…”
Section: Introductionmentioning
confidence: 99%
“…Even when the series resistance is clearly influencing the final characteristic the variation over the array is smaller than in the other two array-types. The smaller variation in the formed state potentially reduces the device-to-device variability across the array during switching [30,33]. For a pure memory operation, this type of array is certainly a better choice, however this suffers from the drawback discussed above during the VMM operations.…”
Section: Discussionmentioning
confidence: 99%
“…where  is an unknown matrix, while  and  are known matrices. Now, an explicit staggered predictor-corrector procedure based on communication-avoiding Arnoldi (CA-Arnoldi) method has been implemented in (71) for obtaining the corrected displacement. Then we can get the temperature field from (35).…”
Section: Bem Simulation For Micropolar Poro-thermoelastic Fieldsmentioning
confidence: 99%
“…In addition to different nanoscale transistors, the lessons learned during development of different generations of compact models have also been successfully used to model many emerging devices such as metal-oxide-based resistive randomaccess memory (RRAM) devices [71,72], insulator-metal-transition devices [73], biomolecular memristors [74] and memcapacitors [75] etc.…”
Section: Modeling Of Novel Transistors and Emerging Devicesmentioning
confidence: 99%