Analog placement based on novel symmetry-island formulation

Abstract

In this paper, we present the first amortized linear-time packing algorithm for the placement with symmetry constraints. We first introduce the concept of a symmetry island which is formed by modules of the same symmetry group in a single connected placement. Based on this concept and the B*-tree representation, we propose automatically symmetric-feasible B*-trees (ASF-B*-trees) to directly model the placement of a symmetry island. Unlike the previous works that can handle only 1D symmetry constraints, our ASF-B*-tree is the first in the literature to additionally consider 2D symmetry. We then present hierarchical B*-trees (HB*-trees) which can simultaneously optimize the placement with both symmetry islands and non-symmetry modules. Unlike the previous works, our approach can guarantee the close proximity of symmetry modules and significantly reduce the search space based on the symmetry-island formulation. In particular, the packing time for an ASF-B*-tree or an HB*-tree is the same as that for a plain B*-tree (only amortized linear) and much faster than previous works which need at least loglinear time. Experimental results show that our approach achieves the best published quality and runtime efficiency for analog placement.

SWARM: A Self-Organization Approach for Layout Automation in Analog IC Design

“…While there are various different placement algorithms such as Min-Cut and Force-Directed Placement, the most widely used one is Simulated Annealing [3], for example utilized in [4], [9]- [11]. Evolutionary approaches such as genetic algorithms have as well been applied to analog placement [12], and furthermore, [13] also investigates the use of neural networks.…”

“…Amongst others, particular attention lies on abstract floorplan models such as TCG-S [4], sequence pairs [5], [9] and [10] and more enhanced representations [11]. Particular research effort is spent on the formal, explicit consideration of constraints.…”

“…Particular research effort is spent on the formal, explicit consideration of constraints. E.g., for placement many algorithms take device symmetry [5] and [11] and device proximity [10] and [14] into account. For routing, the constraints of interest include net shielding [6] and wiring symmetry [8].…”

Thermal-Driven Analog Placement Considering Device Matching

“…Analog placement considering device matching constraints has been extensively studied based on various floorplan representations, such as the absolute floorplan representation [4,7], B*-tree [2,17], hierarchical B*-tree (HB*-tree) [8], sequence pair (SP) [1,18], transitive closure graphs (TCG) [10,22], and corner block list (CBL) [11] for symmetry constraints, and CBL and grid-based approaches [14] for common-centroid constraints. Among these works, only [4,7,11] addressed thermally constrained symmetric placement.…”

Analog Placement Based on Symmetry-Island Formulation

“…The respective centers of b and b are (x, y) and (x , y ), and the respective widths/heights of b and b are Given the coordinate of the representative b and the vertical symmetry axisx, the coordinate of the symmetric module b can be calculated by (1). We have x = 2 ×x − x and y = y .…”