An Overview of In-memory Processing with Emerging Non-volatile Memory for Data-intensive Applications

Abstract

The conventional von Neumann architecture has been revealed as a major performance and energy bottleneck for rising data-intensive applications. The decade-old idea of leveraging in-memory processing to eliminate substantial data movements has returned and led extensive research activities. The effectiveness of in-memory processing heavily relies on the memory scalability, which cannot be satisfied by traditional memory technologies. Emerging non-volatile memories (eNVMs) that pose appealing qualities such as excellent scaling and low energy consumption, on the other hand, have been heavily investigated and explored for realizing in-memory processing architecture. In this paper, we summarize the recent research progress in eNVM-based in-memory processing from various aspects, including the adopted memory technologies, locations of the in-memory processing in system, supported arithmetics, as well as applied applications.

Multi-Level Neuromorphic Devices Built on Emerging Ferroic Materials: A Review

“…The spin-based devices require a lower programming voltage compared to ReRAM (Park et al, 2013 ; Adam et al, 2017 ) and PCM (Papandreou et al, 2011 ; Tuma et al, 2016 ). They also demonstrate higher endurance compared to ReRAM and PCM (Prenat et al, 2016 ; Li et al, 2019 ). While the multi-bit capability of spintronic devices may be limited by the low ON/OFF ratio (G On /G Off ~ 2–3), it is worthwhile to note that high precision weight matrices can be mapped to multiple crossbars in large scale implementation of in-memory computing.…”

“…Such drift in device conductance significantly degrades the desirable data retention and thus requires additional circuit-level compensation scheme in real applications, leading to additional energy consumption and delay (Yu and Chen, 2016 ). As for filament-based ReRAM with oxides such as HfO x /TaO x , although it has advantages of compact cell/array size, large device variability (especially at high resistance states) can be a major hindrance (Yu and Chen, 2016 ; Li et al, 2019 ). The large device variation not only places challenges on the sensing circuit but also leads to a reduced number of bits per cell, even when the device-level conductance ON/OFF ratio is high (Chakraborty et al, 2020b ).…”

“…On the other hand, emerging non-volatile memories (NVM) based on novel physical mechanisms can lead to significant reduction of leakage power and achieve high on-chip density compared to CMOS, while mimicking key neuro-synaptic functionalities for neuromorphic computing (Yu and Chen, 2016 ; Li et al, 2019 ). Particularly, the emerging NVM technologies have great potential to provide scalable and energy efficient building blocks for crossbar based in-memory computing by performing computation within memory arrays (Ambrogio et al, 2018 ; Ielmini and Wong, 2018 ).…”

Hardware-Accelerated Platforms and Infrastructures for Network Functions: A Survey of Enabling Technologies and Research Studies

“…It is therefore worthwhile to investigate inmemory acceleration in NVM memory cells. Li et al [294] have presented an overview of NVM based in-memory based acceleration techniques. NVM can support wider function acceleration, such as logic, arithmetic, associative, vector.…”

Triangle Counting Accelerations: From Algorithm to In-Memory Computing Architecture

“…Through performing computation where the data resides, in-memory computing paradigm can save most of the off-chip data communication energy and latency by exploiting the large internal memory inherent bandwidth and inherent parallelism [4,5]. As a result, in-memory computing has appeared as a viable way to carry out the computationally-expensive and memory-intensive tasks [6,7]. This becomes even more promising when being integrated with the emerging non-volatile Spin-Transfer Torque Magnetic RAM (STT-MRAM) memory technologies.…”