An OFDMA based RF interconnect for massive multi-core processors

Abstract

A paradigm shift is apparent in Chip Multiprocessor (CMP) design, as the new performance bottleneck is becoming communication rather than computation. It is widely provisioned that number of cores on a single chip will reach thousands in a decade. Thus, new high rate interconnects such as optical or RF have been proposed by various researchers. However, these interconnect structures fail to provide essential requirements of heterogeneous on-chip traffic; bandwidth reconfigurability and broadcast support with a low complex design. In this paper we investigate the feasibility of a new Orthogonal Frequency Division Multiple Access (OFDMA) RF interconnect for the first time to the best of our knowledge. In addition we provide a novel dynamic bandwidth arbitration and modulation order selection policy, that is designed regarding the bimodal on-chip packets. The proposed approach decreases the average latency up to 3.5 times compared to conventional static approach.

Flexible Radio Interface for NoC RF-Interconnect

“…However we can consider that subcarriers may be dynamically re-allocated depending on each cluster requirements in terms of transmission throughput or delay. Previous studies have shown that a 3.5x lower average latency can be achieved with this approach in comparison to static allocation scheme [18].…”

Radar Signal Processing for Sensing in Assisted Living: The Challenges Associated With Real-Time Implementation of Emerging Algorithms

“…However, note that offline training is often realized and the algorithm performances are evaluated using floating-point precision. Regarding real-time implementation, fixed-point arithmetic is privileged, limiting the performances and significantly decreasing the accuracy [39]. However, half-precision floating-point format seems to be interesting to address future implementations on FPGA as well as approximated computing to maintain good energy-performance trade-offs [30].…”

Sizing of the physical layer of a RF intra-chip communications

“…Moreover to allow data rate and message recipient reconfiguration, this solution needs to reconfigure the RF part, including the frequency of the local oscillator and the bandwidth of the system, that is quite complex and power consuming. The OFDMA modulation scheme has been proposed in [8] instead of the FDMA modulation, to divide the available bandwidth into as non-interferent subcarriers as necessary. Using this modulation, we achieve the maximum simultaneous transmissions over the whole band without interference between carriers.…”

“…In the event of a RF architecture which is composed of 32 RF-NoC [8] interfaces with their own Tx/Rx that provide communications between 32 clusters through a transmission line, and to allow all clusters to communicate with each other simultaneously and in both directions, 992 simultaneous transmissions possible can occur. The system needs 1024 subcarriers.…”

“…In this context, as described in [8] we propose to develop a hierarchical communication scheme for which a flexible RF interconnect is used to communicate between distant clusters of a single chip. Each of these clusters contains a wired NoC, whose processors communicate between each others by conventional buses, and a transmitter/receiver (Tx/Rx) system for the transmission with other distant clusters via a waveguide (RF transmission line)( fig.1).…”