An integrated 5.2GHz CMOS T/R switch with LC-tuned substrate bias

Talwalkar, N.; Yue, C. Patrick; Wong, S.S.

doi:10.1109/isscc.2003.1234336

Cited by 26 publications

(9 citation statements)

References 4 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…The TR switch network shown in Fig. 11(a) is used to isolate the differential input and output front-ends from each other [28]. Inductor , as part of the TR switch, acts as an electrostatic discharge (ESD) protection device, hence, eliminating the need for a diode ESD protection that would present a prohibitively large parasitic capacitance at 60 GHz [29].…”

Section: Transmit-receive (Tr) Switchmentioning

confidence: 99%

An Energy Harvesting 2$\times$2 60 GHz Transceiver With Scalable Data Rate of 38–2450 Mb/s for Near-Range Communication

Taghivand¹,

Aggarwal

Rajavi

et al. 2015

IEEE J. Solid-State Circuits

View full text Add to dashboard Cite

A fully integrated 2 2 CMOS transceiver at 60 GHz with energy harvesting capability in the transmitter mode and on-chip dipole antennas is demonstrated. The radio supports on-off-keying (OOK) modulation and a programmable data rate of 38 to 2450 Mb/s at a BER of less than 5 10 . The power consumption of the transmitter scales with data rate from 100 W to 6.3 mW at 5 cm range and from 260 W to 11.9 mW at 10 cm range. This yields an energy efficiency of 2.6 pJ/b at 5 cm and 4.9 pJ/b at 10cm. The energy harvesting circuits operate at 2.45 GHz with an average efficiency of 33%. The harvesting antenna and its matching components are off-chip. The complete transceiver including the energy harvesting block and on-chip antennas occupies 1.62 mm in 40 nm CMOS.Index Terms-Close range, dipole antenna, energy harvest, impulse radio, IR-UWB, low power, MIMO, mmWave, near range, on-chip antenna, OOK, power harvest, 60 GHz, 2 2, ultra wide band.

show abstract

Section: Transmit-receive (Tr) Switchmentioning

confidence: 99%

An Energy Harvesting 2$\times$2 60 GHz Transceiver With Scalable Data Rate of 38–2450 Mb/s for Near-Range Communication

Taghivand¹,

Aggarwal

Rajavi

et al. 2015

IEEE J. Solid-State Circuits

View full text Add to dashboard Cite

show abstract

“…Directly floating the P-substrate node can lead to a latch-up hazard. An LC-tuned substrate bias network was proposed to alleviate this problem at the cost of larger chip area due to an additional space separation to substrate contacts and an extra inductor [2]. As TW becomes a standard feature in scaled CMOS processes, using TW NMOS for T/R switch is a more effective implementation choice.…”

Section: T/r Switch Designmentioning

confidence: 99%

“…Most CMOS T/R switches reported in literature are limited to operations below 20 GHz [2]- [5]. Switch designs at 24 and 60 GHz have been reported but their linearities (P -1dB ) are limited to less than 5 dBm [6] [7].…”

Section: Introductionmentioning

confidence: 99%

A high-linearity, LC-Tuned, 24-GHz T/R switch in 90-nm CMOS

Park

Shin

Pekarik

et al. 2008

2008 IEEE Radio Frequency Integrated Circuits Symposium

View full text Add to dashboard Cite

This paper presents an LC-tuned, 24-GHz single-pole double-throw (SPDT) transmit/receive (T/R) switch implemented in 90-nm CMOS. The design focuses on the techniques to increase the power handling capability in the transmit (Tx) mode under 1.2-V operation. The switch achieves a measured P -1dB of 28.7 dBm, which represents the highest linearity, reported to date, for CMOS millimeter-wave T/R switches. The transmit and receive (Rx) branches employ different switch topologies to minimize the power leakage into the Rx path during Tx mode, and hence improve the linearity. To accommodate large signal swing, AC floating bias is applied using large bias resistors to all terminals of the switch devices. Triple-well devices are utilized to effectively float the substrate terminals. The switch uses a single 1.2-V digital control signal for T/R mode selection and for source/drain bias. The measured insertion loss is 3.5 dB and return loss is better than − − − −10 dB at 24 GHz. Index Terms -CMOS transmit/receive (T/R) switch, triplewell, 1-dB compression point, floating substrate.

show abstract

“…The conventional topology for CMOS switch is series-shunt, which is only suitable for narrow band design. A different topology of narrow-band CMOS switch is reported [5]. It demonstrates the power performance of a CMOS switch, but the LC-tuned substrate bias network limits the frequency response.…”

Section: Introductionmentioning

confidence: 99%

A GaAs monolithic anti-series varactor pair for voltage-controlled capacitance with reduced RF nonlinearity

Han¹,

Shimura²,

Inagaki³

et al. 2005

2005 European Microwave Conference

View full text Add to dashboard Cite

-A dc-to-50-GHz SPDT switch in standard bulk 0.18-m CMOS process is demonstrated in this paper. In order to extend the operation frequency, the travelingwave circuit topology is utilized. The switch achieves a measured insertion loss of less than 6 dB, a measured isolation of better than 38 dB from dc to 50 GHz. The measured input P 1dB of 17.4 dBm at 5.8 GHz and 19.6 dBm at 40 GHz is attained. The chip size is only 0.5 x 0.5 mm 2 . To our knowledge, this work is the first CMOS switch operating from dc to millimeter-wave frequency with a miniature chip size.

show abstract

An integrated 5.2GHz CMOS T/R switch with LC-tuned substrate bias

Cited by 26 publications

References 4 publications

An Energy Harvesting 2$\times$2 60 GHz Transceiver With Scalable Data Rate of 38–2450 Mb/s for Near-Range Communication

An Energy Harvesting 2$\times$2 60 GHz Transceiver With Scalable Data Rate of 38–2450 Mb/s for Near-Range Communication

A high-linearity, LC-Tuned, 24-GHz T/R switch in 90-nm CMOS

A GaAs monolithic anti-series varactor pair for voltage-controlled capacitance with reduced RF nonlinearity

Contact Info

Product

Resources

About