An instruction-level energy model for embedded VLIW architectures

Sami, Mariagiovanna; Sciuto, D.; Silvano, Cristina; Zaccaria, Vittorio

doi:10.1109/tcad.2002.801105

Cited by 34 publications

(24 citation statements)

References 25 publications

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“…This is also evident in the estimation being over 15% higher than the measured power. The model in [7] maintains a table of additional energy contributions over the NOP energy for each pair of instructions. This has a characterization complexity of O(N 2 ), where N is the total number of instructions of the processor.…”

Section: Results and Conclusionmentioning

confidence: 99%

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An Accurate Energy Estimation Framework for VLIW Processor Cores

Roy¹,

Bhatia²,

Mathur³

2006

2006 International Conference on Computer Design

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Abstract-In this paper, we present a comprehensive energy estimation framework for software executing on Very Long Instruction Word (VLIW) processor cores. The proposed energy model is used as an average energy estimator coupled to the instruction set simulator (ISS) of the processor. The base energy of an execution set is computed as the NOP energy added with incremental energies of each instruction in the execution set. The inter execution-set energy is accurately modeled with a new approach as a linear equation of three factors -functional to functional instruction switching; functional to NOP or prefix instruction swithing; and variability in the length of the execution set. This reduces the characterization complexity of the model to O(N ), where N is the total number of instructions in the instruction set of the processor. We have introduced the concept of "functional separability" in the energy model, wherein the energy of each high-level function of the processor core is distinctly mapped to only one component in the model. The model is also capable of handling control codes with branches and predicated execution. The average error magnitude of the framework when applied on the StarCore processor with a large suite of DSP and control benchmarks is 2.5%, whereas the maximum error is less than 6.0%.

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Section: Results and Conclusionmentioning

confidence: 99%

“…Sami et.al. [6], [7] have proposed a basic model for VLIW processors. However this model has several limitations when applied on practical VLIW processors, as we discuss later.…”

Section: Introductionmentioning

confidence: 99%

An Accurate Energy Estimation Framework for VLIW Processor Cores

Roy¹,

Bhatia²,

Mathur³

2006

2006 International Conference on Computer Design

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“…It becomes evident that the complexity of applying traditional instruction-level methods [1,2] to VLIW processors might be prohibitively high, since they require the storage of the energy parameters for each pair of instructions. Starting from our work proposed in [3], we introduced the temporal and spatial additive properties to reduce such a complexity.…”

Section: Introductionmentioning

confidence: 99%

“…The approach presented in this paper aims at extending and integrating into a comprehensive power estimation and optimisation framework our previous work [3], targeting an instruction-level energy model to evaluate and to optimize the energy consumption associated with a software execution on a pipelined VLIW core. More specifically, the present paper deals with the reduction of the complexity of the energy model of K -issue VLIW processors to quadratic with respect to the number of operations within the instruction set (O(K * |I S A| 2 )), while a black-box model would have a complexity of O(|I S A| K ).…”

Section: Introductionmentioning

confidence: 99%

Reducing the complexity of instruction-level power models for VLIW processors

Bona

Sami

Sciuto

et al. 2005

Des Autom Embed Syst

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Aim of this paper is to propose a high-level power exploration framework based\ud on an instruction-level energy model for VLIW (Very Long InstructionWord) architectures.\ud More specifically, the present paper deals with the reduction of the complexity of the energy\ud model of K-issueVLIWprocessors from exponential with respect to the number of operations\ud within the Instruction Set O(|I SA|K ) to quadratic (O(K ∗ |I SA|2)). The complexity of the\ud energy model has been further simplified by automatically clustering the operations in the ISA\ud with respect to their average energy. Globally, the proposed approach reduces the complexity\ud of the characterization problem for a K-issue VLIW processor to quadratic (O(K ∗ |C|2))\ud with respect to the number of operation clusters. In this way, a more efficient characterization\ud of the VLIW core power consumption can been achieved, while preserving the accuracy of\ud the power estimates. The proposed model has been further extended to provide early power\ud figures and energy/performance trade-offs for multi-cluster VLIW architectures composed of\ud multiple data-path units and a single instruction cache control unit. The proposed high-level\ud power estimation methodology has been applied to the Lx 4-issue VLIW pipelined processor\ud provided by STMicroelectronics

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“…Instead of using macro modeling, this work relies on program profiling to extract the parameters from applications. For instruction-level, the power model is derived through the simulation of various instruction sets [11,14]. However, in general, if the full spectrum of transitions between instructions is considered, the complexity of instruction-level power model increases exponentially with the number of instructions.…”

Section: Prior Workmentioning

confidence: 99%