An Insight into the Hardware and Software Complexity of ECUs in Vehicles

Hegde, Rajeshwari; Mishra, Geetishree; Gurumurthy, K. S.

doi:10.1007/978-3-642-22555-0_11

Cited by 17 publications

(10 citation statements)

References 8 publications

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“…Automotive vehicle manufacturers, for example, are pushing towards integrating more functions requiring high-performance and real-time processing (e.g. advanced driver assistance systems (ADAS), carto-car communications) without increasing the already high number of discrete, networked electronic control units (ECUs) present in modern vehicles [1]. Virtualization plays an important role in these more centralized computing systems, as the applications to be integrated require different levels of realtime capability and safety-related features.…”

Section: Introductionmentioning

confidence: 99%

Enabling partial reconfiguration for coprocessors in mixed criticality multicore systems using PCI express single-root I/O virtualization

Sander

Sandmann

et al. 2014

2014 International Conference on ReConFigurable Computing and FPGAs (ReConFig14)

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Especially in complex system-of-systems scenarios, where multiple high-performance or real-time processing functions need to co-exist and interact, reconfigurable devices together with virtualization techniques show considerable promise to increase efficiency, ease integration and maintain functional and non-functional properties of the individual functions. In this paper, we propose a concept that leverages the advantages of FPGA's partial reconfiguration in heterogeneous mixed criticality multicore systems. We describe the basic idea how to handle the partial reconfiguration transparently for non-critical tasks, while providing full control and a predictable behavior for safety relevant tasks. Our prototype is implemented on an Intel multicore system and a Xilinx Virtex-7 FPGA connected via PCI Express (PCIe), taking advantage of the Single-Root I/O Virtualization (SR-IOV) capabilities in modern PCIe implementations. Preliminary experimental results show that our concept achieves significantly shorter reconfiguration time with lower variance compared to other solutions.

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Section: Introductionmentioning

confidence: 99%

Enabling partial reconfiguration for coprocessors in mixed criticality multicore systems using PCI express single-root I/O virtualization

Sander

Sandmann

et al. 2014

2014 International Conference on ReConFigurable Computing and FPGAs (ReConFig14)

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“…The growing number of ADAS functions integrated into a vehicle, as highlighted before, increases the complexity and cost of its development [11]. Furthermore, it is a well established safety principle that computer-based systems should be considered unsafe unless convincingly argued otherwise (i.e., safety must be shown, not assumed).…”

Section: Fig 1 Location Of Radar Sensors In a Car And The Corresponmentioning

confidence: 99%

Frequency dividers in radar target stimulator applications

Vorderderfler

Gadringer

Schreiber

et al. 2018

Elektrotech. Inftech.

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More and more driver assistance systems are integrated into modern vehicles. This development results in a continuous rise in the complexity of these vehicles, as the functions have to comply to the corresponding safety standards. Testing and validating these functions on an automotive test bench instead of driving tests at closed proving grounds requires comprehensive stimulation of the involved sensors. In this article we are focusing on an approach for stimulating short-range radar sensors of a vehicle located on such a test bench. Coping with the requirements imposed by these types of sensors we investigate the usage of frequency multipliers and dividers in the frequency translation section of the radar stimulator. For this purpose, we provide an overview on different concepts for these multipliers and dividers. After reviewing the advantages and disadvantages of these devices, we provide measurement results of a stimulator setup applying this type of frequency translation.Keywords: radar systems; test equipment; radar applications; radar equipment; radar signal processing; radio frequency circuit design

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“…The algorithm is illustrated in Fig. 2 for 3 coprocessors [CP 0 , .., CP 2 ] and [N 0 , .., N 2 ] = [4,2,1]. Every coprocessor CP i is associated with a number N i , the TLP Count, representing the amount of consecutive TLPs within a cycle C j .…”

Section: Dma Transfer Bandwidth Managementmentioning

confidence: 99%

“…Automotive vehicle manufacturers, for example, are pushing towards integrating more functions requiring high-performance and real-time processing (advanced driver assistance systems (ADAS), carto-car communications) without increasing the already high number of discrete, networked electronic control units present in modern vehicles [1]. Virtualization plays an important role in these, as the applications to be integrated require different levels of real-time capability and safety-related features.…”

Section: Introductionmentioning

confidence: 99%

A flexible interface architecture for reconfigurable coprocessors in embedded multicore systems using PCIe Single-root I/O virtualization

Sander

Baehr

Luebbers

et al. 2014

2014 International Conference on Field-Programmable Technology (FPT)

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Especially in complex system-of-systems scenarios, where multiple high-performance or real-time processing functions need to co-exist and interact, reconfigurable devices together with virtualization techniques show considerable promise to increase efficiency, ease integration and maintain functional and non-functional properties of the individual functions. In this paper, we propose a flexible interface architecture with low overhead for coupling reconfigurable coprocessors to highperformance general-purpose processors, allowing customized yet efficient construction of heterogeneous processing systems. Our implementation is based on PCI Express (PCIe) and optimized for virtualized systems, taking advantage of the SR-IOV capabilities in modern PCIe implementations. We describe the interface architecture and its fundamental technologies, detail the services provided to individual coprocessors and accelerator modules, and quantify key corner performance indicators relevant for virtualized applications.

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An Insight into the Hardware and Software Complexity of ECUs in Vehicles

Cited by 17 publications

References 8 publications

Enabling partial reconfiguration for coprocessors in mixed criticality multicore systems using PCI express single-root I/O virtualization

Enabling partial reconfiguration for coprocessors in mixed criticality multicore systems using PCI express single-root I/O virtualization

Frequency dividers in radar target stimulator applications

A flexible interface architecture for reconfigurable coprocessors in embedded multicore systems using PCIe Single-root I/O virtualization

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