An improved two-tier L-L method for characterizing symmetrical microwave test fixtures

Zúñiga‐Juárez, J. E.; Reynoso-Hernández, J.A.; Loo‐Yau, J. R.; Maya-Sanchez, M. C.

doi:10.1016/j.measurement.2011.05.013

Cited by 12 publications

(17 citation statements)

References 14 publications

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“…978-1-4673-0416-0/12/$31.00 ©2012 IEEE Recently a method to determine Z0 of the uniform transmission lines embedded in connectors has been published in [10][11]. The method uses two transmission lines (L-L) of different lengths and arbitrary characteristic impedance.…”

Section: Rtu2c-3mentioning

confidence: 99%

“…The method uses two transmission lines (L-L) of different lengths and arbitrary characteristic impedance. The L-L method not only allows the computation of the line characteristic impedance (Z0) but also provides the propagation constant (γ) [9], and the connectors matrix elements [10,11]. Until now the L-L method has been applied to characterize a symmetrical test fixture and transmission lines made in FR4 substrate [10].…”

Section: Rtu2c-3mentioning

confidence: 99%

“…However to the best of our knowledge this method has not been applied yet in the characterization of transmission lines embedded in pads and CMOS FETs embedded between pads and lines as shown in Fig.1. The goal of this work is to demonstrate that the L-L method developed in [10,11] is also suitable for characterizing devices embedded between pads and lines. The method is divided in two parts.…”

Section: Rtu2c-3mentioning

confidence: 99%

“…According to [10]- [11] the ABCD matrix of any DUT embedded in a structure as shown in Fig.1, is given by …”

Section: De-embedding Proceduresmentioning

confidence: 99%

“…A reliable method for determining γ of lines of arbitrary characteristic impedance embedded between any kind of transitions was developed in [9]. Recently, [9][10][11] developed a method to determine the characteristic impedance for any line embedded in symmetrical and reciprocal connectors.…”

Section: A Computation Of [Ml]mentioning

confidence: 99%

See 4 more Smart Citations

On-wafer CMOS transistors de-embedding method using two transmission lines of different lengths

Saavedra-Gomez

Loo‐Yau

Moreno

et al. 2012

2012 IEEE Radio Frequency Integrated Circuits Symposium

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By using transmission line measurements of arbitrary characteristic impedance, this paper introduces an alternative method to de-embed parasitic structures such as pads and interconnection lines. The proposed method uses two uniform transmission lines of arbitrary characteristic impedance as calibration standard (L-L method). The two transmission lines have the same characteristic impedance, but different lengths. Experimental S-parameters data of on-wafer CMOS FETs de-embedded with the proposed L-L method, Mangan and the Pad-Open-Short De-embedded (PSOD) methods are compared. The S-parameter data deembedded with both methods the PSOD and the proposed two-tier L-L show high correlation. Therefore the proposed method is validated.

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Section: Rtu2c-3mentioning

confidence: 99%

Section: Rtu2c-3mentioning

confidence: 99%

Section: Rtu2c-3mentioning

confidence: 99%

“…According to [10]- [11] the ABCD matrix of any DUT embedded in a structure as shown in Fig.1, is given by …”

Section: De-embedding Proceduresmentioning

confidence: 99%

Section: A Computation Of [Ml]mentioning

confidence: 99%

See 3 more Smart Citations

On-wafer CMOS transistors de-embedding method using two transmission lines of different lengths

Saavedra-Gomez

Loo‐Yau

Moreno

et al. 2012

2012 IEEE Radio Frequency Integrated Circuits Symposium

View full text Add to dashboard Cite

show abstract

Application of a multiline material characterization method to inkjet printed electronics

Sillanpää

Rasku

Makinen

2013

Int J RF and Microwave Comp Aid Eng

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Material characterization has become increasingly important with the adoption of simulation-based workflow for microwave electronics design. This article focuses on the characterization of printable electronics materials using transmission-line measurements and demonstrates the capability of the multiline characterization method to separate dielectric and conductor losses when line geometry and material properties vary between the lines. The effects of multiline algorithm, number of line standards, and methods for selecting optimal line lengths are demonstrated. Consistent characterization results are obtained from inkjet-printed transmission lines on two different substrate materials. In addition, local conductor thickness variations are demonstrated as an effective way to decrease losses. Finally, the simulation-based procedure for determining the material properties is outlined and applied to printable electronics characterization.

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A Simple and Reliable Method to Extract The Electrical Equivalent Circuits of CMOS pads

Saavedra-Gomez¹,

Loo‐Yau²,

Reynoso-Hernández

et al. 2013

Micro & Optical Tech Letters

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This article presents a method to extract the elements of the electrical equivalent circuit model CMOS pads using two uniform transmission lines fabricated on a lossy Si substrate. The lengths of the uniform transmission lines are different, while its characteristic impedances are equal and can be of an arbitrary value. The proposed method is useful for modeling CMOS pads that can be represented by symmetrical and reciprocal ABCD matrices, denoted as [Mpad]. Then a T‐network is used to represent the CMOS pad and its elements are determined converting [Mpad] into a Z‐parameters matrix. Experimental data from 0.4–20 GHz show a high correlation with theoretical data. © 2013 Wiley Periodicals, Inc. Microwave Opt Technol Lett 55:3033–3037, 2013

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An improved two-tier L-L method for characterizing symmetrical microwave test fixtures

Cited by 12 publications

References 14 publications

On-wafer CMOS transistors de-embedding method using two transmission lines of different lengths

On-wafer CMOS transistors de-embedding method using two transmission lines of different lengths

Application of a multiline material characterization method to inkjet printed electronics

A Simple and Reliable Method to Extract The Electrical Equivalent Circuits of CMOS pads

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