A Simple and Reliable Method to Extract The Electrical Equivalent Circuits of CMOS pads

Abstract

This article presents a method to extract the elements of the electrical equivalent circuit model CMOS pads using two uniform transmission lines fabricated on a lossy Si substrate. The lengths of the uniform transmission lines are different, while its characteristic impedances are equal and can be of an arbitrary value. The proposed method is useful for modeling CMOS pads that can be represented by symmetrical and reciprocal ABCD matrices, denoted as [Mpad]. Then a T‐network is used to represent the CMOS pad and its elements are determined converting [Mpad] into a Z‐parameters matrix. Experimental data from 0.4–20 GHz show a high correlation with theoretical data. © 2013 Wiley Periodicals, Inc. Microwave Opt Technol Lett 55:3033–3037, 2013

An empirical nonlinear RF model for CMOS fet suitable for modeling the breakdown region

“…Prior to the extraction of intrinsic elements, it was necessary to determine the elements of the equivalent circuit of the pads and to extract the parasitic resistances values based on Refs. and , respectively.…”

“…The equivalent circuit elements of the pads are accurately extracted through measurements using the two‐transmission lines method as suggested in Refs. ; while parasitic resistances are extracted according to the procedure proposed in Ref. .…”

Effects of Gate-Length Scaling on Microwave MOSFET Performance

“…The determination and subsequent de-embedding of the extrinsic elements is essential to access the performance of the intrinsic FET that is not directly measurable, since the intrinsic section of the FET is experimentally inaccessible. The extrinsic elements are usually determined using "cold" S-parameter measurements (V DS = 0 V, i.e., passive device) [10][11][12][13][14][15][16], passive test structures [13][14][15][16][17], and full-wave electromagnetic simulations [18][19][20][21]. In practice, the "cold" approach is the most used, since it does not require additional dummy structures or detailed information about the FET layout.…”