An HDR CMOS image sensor with spiking pixels, pixel-level ADC, and linear characteristics

Döge, Jens; Schönfelder, Gert; Streil, G.T.; König, Andreas

doi:10.1109/tcsii.2002.1002518

Cited by 40 publications

(22 citation statements)

References 6 publications

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“…Since an asynchronous reset approach is adopted, the power consumed is spread over time and large peak currents typically experienced during the reset phase of conventional architecture is avoided. In addition, in contrast to the spiking pixel architecture [7], only a single pulse (PWM) is used in our approach in order to encode the photocurrent which results in further power saving. The average current of the spiking pixel was reported to be 132.8 A per pixel with no on-pixel memory [7], compared to 1.6 A of our sensor with on-pixel memory.…”

Section: B Test Resultsmentioning

confidence: 99%

“…In addition, in contrast to the spiking pixel architecture [7], only a single pulse (PWM) is used in our approach in order to encode the photocurrent which results in further power saving. The average current of the spiking pixel was reported to be 132.8 A per pixel with no on-pixel memory [7], compared to 1.6 A of our sensor with on-pixel memory. The FPN was measured by uniformly illuminating the array (without a lens or lens mount) using the integrating sphere and capturing the flat field image.…”

Section: B Test Resultsmentioning

confidence: 99%

Section: A Digital Pixel Sensor Array Withmentioning

confidence: 99%

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A Digital Pixel Sensor Array With Programmable Dynamic Range

Kitchen

Bermak

Bouzerdoum

2005

IEEE Trans. Electron Devices

104

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Section: B Test Resultsmentioning

confidence: 99%

Section: B Test Resultsmentioning

confidence: 99%

Section: A Digital Pixel Sensor Array Withmentioning

confidence: 99%

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A Digital Pixel Sensor Array With Programmable Dynamic Range

Kitchen

Bermak

Bouzerdoum

2005

IEEE Trans. Electron Devices

104

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“…Furthermore, it had good temperature behavior up to 85 8C. In year 2002 a high dynamic CMOS imager with spiking pixels, pixel-level ADC, and linear characteristics was reported [88]. It had a DR of 93 dB, although 120 dB was expected.…”

Section: Linearmentioning

confidence: 99%

Review of CMOS image sensors

Bigas

Cabruja

Salví

2006

Microelectronics Journal

481

230

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The role of CMOS Image Sensors since their birth around the 1960s, has been changing a lot. Unlike the past, current CMOS Image Sensors are becoming competitive with regard to Charged Couple Device (CCD) technology. They offer many advantages with respect to CCD, such as lower power consumption, lower voltage operation, on-chip functionality and lower cost. Nevertheless, they are still too noisy and less sensitive than CCDs.Noise and sensitivity are the key-factors to compete with industrial and scientific CCDs. It must be pointed out also that there are several kinds of CMOS Image sensors, each of them to satisfy the huge demand in different areas, such as Digital photography, industrial vision, medical and space applications, electrostatic sensing, automotive, instrumentation and 3D vision systems.In the wake of that, a lot of research has been carried out, focusing on problems to be solved such as sensitivity, noise, power consumption, voltage operation, speed imaging and dynamic range. In this paper, CMOS Image Sensors are reviewed, providing information on the latest advances achieved, their applications, the new challenges and their limitations. In conclusion, the State-of-the-art of CMOS Image Sensors. q

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“…The self-resetting scheme improves the dynamic range by recycling the well such that higher photocurrents are detected. The output takes the form of a series of spikes, resulting in the so-called "spiking pixel" [9], which is of particular interest when mimicking the processes of biological vision [10]. This method presents several issues when dealing with high-resolution pixel arrays mainly related to the need for a complex bus-arbitration system, termed address event representation (AER), and the temporal jitter due to the collision problem in the output bus which affects the SNR.…”

mentioning

confidence: 99%

A DPS array with programmable resolution and reconfigurable conversion time

Bermak

Yung²

2006

IEEE Trans. VLSI Syst.

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Abstract-A CMOS digital pixel sensor (DPS) with programmable resolution and reconfigurable conversion time is described. The chip features a unique architecture based on the pulse width modulation (PWM) technique and operates with either an 8-b or 4-b accuracy. The 8-b conversion mode is used for high-precision imaging while the 4-b conversion mode provides a shorter conversion time and a two times increase in spatial resolution. Two quantization schemes are studied, namely, the uniform and the nonuniform time-domain quantizers, which are referred to as UQ and NUQ, respectively. It is shown that the latter scheme not only permits to linearize the nonlinear response of the PWM sensor, but also allows to significantly speed up the conversion time, particularly for wide dynamic range and low coding resolutions. A prototype of 32 32/64 32 pixels has been fabricated using 1-poly, 5-metal CMOS 0.35-m n-well standard process.Power dissipation is 10 mW at DD = 3 3 V, dynamic range is 90 dB, while dark current was measured at 1 pA. The reconfiguration features of the chip have been verified experimentally.Index Terms-CMOS imager, digital pixel sensor (DPS), programmable resolution.

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An HDR CMOS image sensor with spiking pixels, pixel-level ADC, and linear characteristics

Cited by 40 publications

References 6 publications

A Digital Pixel Sensor Array With Programmable Dynamic Range

A Digital Pixel Sensor Array With Programmable Dynamic Range

Review of CMOS image sensors

A DPS array with programmable resolution and reconfigurable conversion time

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