2016 29th Symposium on Integrated Circuits and Systems Design (SBCCI) 2016
DOI: 10.1109/sbcci.2016.7724071
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An FPGA-based accelerator for multiple real-time template matching

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Cited by 6 publications
(6 citation statements)
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“…Due to large amounts of MAC computations in (1), ZNCC formula should be simplified further considering stream processing and parallel computation on an FPGA. The simplified equation [25] is formulated and shown in Fig. 2.…”
Section: Zncc-based Template Matching On Fpgas a Zncc-based Template Matchingmentioning
confidence: 99%
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“…Due to large amounts of MAC computations in (1), ZNCC formula should be simplified further considering stream processing and parallel computation on an FPGA. The simplified equation [25] is formulated and shown in Fig. 2.…”
Section: Zncc-based Template Matching On Fpgas a Zncc-based Template Matchingmentioning
confidence: 99%
“…It is obvious that template matching in a size of 32 × 32 runs once after 32 clock cycles. This kind of concurrent operation makes template matching run very fast, which is different from the memory-based approach [25]. But there is a shortcoming of low matching-based location precision at some position due to template size step in the column-scanning process along the row directions but high location precision due to one-pixel step along the column direction.…”
Section: B Image Caching On Fpgasmentioning
confidence: 99%
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