An Experimental Approach to Accurate Alpha-SER Modeling and Optimization Through Design Parameters in 6T SRAM Cells for Deep-Nanometer CMOS

Detailed 8-transistor SRAM cell analysis for improved alpha particle radiation hardening in nanometer technologies

“…On the other hand, it must be long enough to keep the memory in hold time as long as possible. Based on previous results [21] T rad was settled to 30 min, the mean estimated ASER error due to not detecting multiple flips during that period was below 1‰.…”

“…We also assumed a different probability density function for electron and hole collection [27], a e and b e are the parameters used to describe electron collection density function and a h and b h the parameters for hole collection. To compute SER, parameters b e and b h must be obtained experimentally [21]. Usually the magnitude of Q crit,e required to flip the node being at ''1'' is smaller than the corresponding Q crit,h required to flip the node being at ''0'', and therefore a dissimilar dependency of SER on nMOS and pMOS drain areas must be expected.…”

“…(3) using the values of parameters b e = 4.95 Â 10 14 C À1 and b h = 1.26 Â 10 15 C À1 obtained by fitting experimental data measured in an accelerated irradiation test with alpha particles in a 65 nm CMOS technology [21]. Q crit,e and Q crit,h dependence with W n and W p , were computed by electrical simulation using a double exponential current source to emulate the effect of charge collection at the cell struck node (Fig.…”

“…9 indicates that this value can be further enhanced up to 200% by increasing the PR of the 8T cell up to 2.5. This is at the expenses of increasing cell area and degrading the write voltage margin from 396 mV to 324 mV, a value that is still reasonable (the area increase cannot be avoided, while write-ability can be recovered by using write assist techniques like those reported in [21,32]). …”

“…[18] reported a slightly better Q crit (7%) of a conventional 6T-cell over 8T-cell for a 90 nm CMOS Technology, while in [19] it was found that the Q crit of a 65 nm 8T cell with minimum sized transistors was 6% lower than a 6T cell designed with minimum size transistors (this later result is not contradictory with the previous one, as usually not all the transistors of a conventional 6T-cell are minimum sized). Other studies have shown that Q crit alone is not enough to quantify the device soft error rate [20,21], since the sensitivity to radiation is also determined by the charge collection efficiency and layout area of sensitive nodes. The aim of this work is complementing these and other previous work based exclusively on Q crit analysis, by reporting experimental results of alpha particle SER in minimum sized 8T-cells compared to 6T-cells, and providing practical guidelines to improve memory hardening to radiation.…”