Detailed 8-transistor SRAM cell analysis for improved alpha particle radiation hardening in nanometer technologies

Bota, S.; Torrens, Gabriel; Verd, J.; Segura, J.

doi:10.1016/j.sse.2015.05.036

Cited by 10 publications

(4 citation statements)

References 31 publications

(39 reference statements)

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“…The results of this study suggest that hardening key elements of the peripheral circuitry of a memory device (e.g. implementing the registers with additional transistors [13] or a dual-interlocked cell architecture [14]) could effectively mitigate the most common failure modes. This would dramatically improve the failure rate of the device, at the expense of a small increase in the area of the peripheral circuitry.…”

Section: Resultsmentioning

confidence: 97%

Single-Event Effects in the Peripheral Circuitry of a Commercial Ferroelectric Random Access Memory

Bosser

Gupta

Javanainen

et al. 2018

IEEE Trans. Nucl. Sci.

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Section: Resultsmentioning

confidence: 97%

Single-Event Effects in the Peripheral Circuitry of a Commercial Ferroelectric Random Access Memory

Bosser

Gupta

Javanainen

et al. 2018

IEEE Trans. Nucl. Sci.

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“…The most common SRAM cell types are formed by either six or eight transistors [18][19][20][21]. In this work, we focus on the six-transistor cell, the so-called 6T cell.…”

Section: Sram Pufsmentioning

confidence: 99%

SRAM-Based PUF Reliability Prediction Using Cell-Imbalance Characterization in the State Space Diagram

et al. 2022

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This work proposes a methodology to estimate the statistical distribution of the probability that a 6T bit-cell starts up to a given logic value in SRAM memories for PUF applications. First, the distribution is obtained experimentally in a 65-nm CMOS device. As this distribution cannot be reproduced by electrical simulation, we explore the use of an alternative parameter defined as the distance between the origin and the separatrix in the bit-cell state space to quantify the mismatch of the cell. The resulting distribution of this parameter obtained from Monte Carlo simulations is then related to the start-up probability distribution using a two-component logistic function. The reported results show that the proposed imbalance factor is a good predictor for PUF-related reliability estimation with the advantage that can be applied at the early design stages.

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“…In [9,10], SRAMs cells are classified on the basis of their start-up reliability under different external condition variations such as supply voltage, ramp up time, and temperature. Exploring an appropriate range of these operational conditions in post-processing PUF reliability can be assessed [11]. With this technique, cells that show less ability to keep the same start-up value under different external conditions are recognized in such a way that they can be eliminated from the PUF implementation [9].…”

Section: Introductionmentioning

confidence: 99%

Estimation during Design Phases of Suitable SRAM Cells for PUF Applications Using Separatrix and Mismatch Metrics

et al. 2021

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Physically unclonable functions (PUFs) are used as low-cost cryptographic primitives in device authentication and secret key creation. SRAM-PUFs are well-known as entropy sources; nevertheless, due of non-deterministic noise environment during the power-up process, they are subject to low challenge-response repeatability. The dependability of SRAM-PUFs is usually accomplished by combining complex error correcting codes (ECCs) with fuzzy extractor structures resulting in an increase in power consumption, area, cost, and design complexity. In this study, we established effective metrics on the basis of the separatrix concept and cell mismatch to estimate the percentage of cells that, due to the effect of variability, will tend to the same initial state during power-up. The effects of noise and temperature in cell start-up processes were used to validate the proposed metrics. The presented metrics may be applied at the SRAM-PUF design phases to investigate the impact of different design parameters on the percentage of reliable cells for PUF applications.

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Detailed 8-transistor SRAM cell analysis for improved alpha particle radiation hardening in nanometer technologies

Cited by 10 publications

References 31 publications

Single-Event Effects in the Peripheral Circuitry of a Commercial Ferroelectric Random Access Memory

Single-Event Effects in the Peripheral Circuitry of a Commercial Ferroelectric Random Access Memory

SRAM-Based PUF Reliability Prediction Using Cell-Imbalance Characterization in the State Space Diagram

Estimation during Design Phases of Suitable SRAM Cells for PUF Applications Using Separatrix and Mismatch Metrics

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