An Efficient Fault Detection and Diagnosis Methodology for Volatile and Non-Volatile Memories

Martirosyan, Suren; Harutyunyan, G.

doi:10.1109/csitechnol.2019.8895189

Cited by 7 publications

(2 citation statements)

References 11 publications

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“…Due to the linear complexity, regularity, symmetry and simplicity of the hardware implementations, the march tests are usually a preferred method, and often the only reasonable method, for RAM testing [ 14 , 15 , 16 , 17 , 18 , 19 ]. Therefore, to maximize the efficiency of transparent testing, a method based on the use of classic march tests was proposed by M. Nicolaidis [ 7 , 8 ].…”

Section: Transparent Testsmentioning

confidence: 99%

Transparent Memory Tests Based on the Double Address Sequences

Mrozek

Yarmolik

2021

Entropy

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An important achievement in the functional diagnostics of memory devices is the development and application of so-called transparent testing methods. This is especially important for modern computer systems, such as embedded systems, systems and networks on chips, on-board computer applications, network servers, and automated control systems that require periodic testing of their components. This article analyzes the effectiveness of existing transparent tests based on the use of the properties of data stored in the memory, such as changing data and their symmetry. As a new approach for constructing transparent tests, we propose to use modified address sequences with duplicate addresses to reduce the time complexity of tests and increase their diagnostic abilities.

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Section: Transparent Testsmentioning

confidence: 99%

Transparent Memory Tests Based on the Double Address Sequences

Mrozek

Yarmolik

2021

Entropy

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“…As the number of possible faults can be unlimited [24], this paper focuses on the commonly used fault models in the literature. This paper also discusses different memory test algorithms with a focus on March series test algorithms as they are commonly used in the industry due to their simplicity, linear-time test complexity, and low area overhead [25]- [27]. The notations used for describing the fault models and the test algorithms are also presented.…”

Section: Introductionmentioning

confidence: 99%

A review paper on memory fault models and test algorithms

Jidin

Hussin

Fook³

et al. 2021

Bulletin EEI

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Testing embedded memories in a chip can be very challenging due to their high-density nature and manufactured using very deep submicron (VDSM) technologies. In this review paper, functional fault models which may exist in the memory are described, in terms of their definition and detection requirement. Several memory testing algorithms that are used in memory built-in self-test (BIST) are discussed, in terms of test operation sequences, fault detection ability, and also test complexity. From the studies, it shows that tests with 22 N of complexity such as March SS and March AB are needed to detect all static unlinked or simple faults within the memory cells. The N in the algorithm complexity refers to Nx*Ny*Nz whereby Nx represents the number of rows, Ny represents the number of columns and Nz represents the number of banks. This paper also looks into optimization and further improvement that can be achieved on existing March test algorithms to increase the fault coverage or to reduce the test complexity.

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Defect Analysis in Memory Unit

Mutkekar¹,

Raju²

2021

Lecture Notes in Electrical Engineering

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An Efficient Fault Detection and Diagnosis Methodology for Volatile and Non-Volatile Memories

Cited by 7 publications

References 11 publications

Transparent Memory Tests Based on the Double Address Sequences

Transparent Memory Tests Based on the Double Address Sequences

A review paper on memory fault models and test algorithms

Defect Analysis in Memory Unit

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