2008 51st Midwest Symposium on Circuits and Systems 2008
DOI: 10.1109/mwscas.2008.4616776
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An efficient architecture of RNS based Wallace Tree multiplier for DSP applications

Abstract: In this paper a novel technique to determine the optimal moduli set has been introduced and an efficient RNS multiplier based on Wallace Tree multiplier (for 32 bit arithmetic unit) for DSP applications is presented. Performance analysis on a number of DSP functions like FIR, FFT etc. clearly indicates the novelty of the scheme.

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Cited by 4 publications
(1 citation statement)
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“…RNS multiplication [11] uses a combination of LUT's and arithmetic units keeping in mind the balance between speed and hardware complexity. Multiplication has been done using an AND gate array, some LUT's and using a multistage carry save adder known as the Wallace Tree Multiplier.…”
Section: Modulo Multipliermentioning
confidence: 99%
“…RNS multiplication [11] uses a combination of LUT's and arithmetic units keeping in mind the balance between speed and hardware complexity. Multiplication has been done using an AND gate array, some LUT's and using a multistage carry save adder known as the Wallace Tree Multiplier.…”
Section: Modulo Multipliermentioning
confidence: 99%