2020
DOI: 10.1109/tcsii.2020.2980387
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An Efficient and Parallel R-LWE Cryptoprocessor

Abstract: Lattice-based cryptography (LBC) is a promising and efficient public key cryptography scheme whose theoretical foundation usually lies in Learning with Error (LWE) problem and its variant such as Ring-LWE (R-LWE) is the most studied cryptosystem which allows for more efficient implementation while maintaining the hardness of an original problem. Polynomial multiplication is the bottleneck of R-LWE, that can either be done using Number Theoretic Transform (NTT) or schoolbook polynomial multiplication (SPM) algo… Show more

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Cited by 39 publications
(14 citation statements)
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“…The overall hardware implementation of R-LWE cryptographic processor [15] based on NTT can resist side-channel attack, yet its speed is quite slower and its execution time is longer as well as highest ATP. The efficient R-LWE design [9] based on the state-of-art fastest available schoolbook polynomial multiplication have the highest frequency; however, it consumes most cycles. The latest processor for Kyber on FPGA [16] only includes optimized NTT design for vector of polynomials.…”
Section: Implementation Results and Comaprisionsmentioning
confidence: 99%
See 1 more Smart Citation
“…The overall hardware implementation of R-LWE cryptographic processor [15] based on NTT can resist side-channel attack, yet its speed is quite slower and its execution time is longer as well as highest ATP. The efficient R-LWE design [9] based on the state-of-art fastest available schoolbook polynomial multiplication have the highest frequency; however, it consumes most cycles. The latest processor for Kyber on FPGA [16] only includes optimized NTT design for vector of polynomials.…”
Section: Implementation Results and Comaprisionsmentioning
confidence: 99%
“…Our proposed design has less number of cycles, i.e., 8,770 and smallest ATP value of 24.84 for encryption, while 2,680 cycles and 2.69 ATP for the decryption. Compared with the best design, our proposed separate M-LWE design have 1.3× Op/s than [6] and 2.1× better ATP trade-off than [9] at a cost of reasonable area consumption.…”
Section: Implementation Results and Comaprisionsmentioning
confidence: 99%
“…The µ-kσ and q-µ-kσ; where k=1,2,3... represents the positive and negative values respectively (in case of LWE with modulus-q). This fact has been exploited by many researchers to utilized the Signed-Magnitude Representation (SMR) for the Gaussian data instead of using a conventional unsigned representation [16], [36]. The modular polynomial multiplication with these negative values can easily be realized as follows: a×(-b) mod…”
Section: A Approximate Modular Multiplier (Axmm)mentioning
confidence: 99%
“…Later on [77] proposed a design of an area/power efficient approximate modular multiplier (so called AxMM) for complete RLWE hardware, by exploiting the statistics of Gaussian noise in addition to the technique of [78]; transforming the unsigned Gaussian data to signed format. Fig.…”
Section: Cryptography Homomorphicmentioning
confidence: 99%