An Architecture of 2-Dimensional 4-Dot 2-Electron QCA Full Adder and Subtractor with Energy Dissipation Study

Abdullah-Al-Shafi, Md.; Bahar, Ali Newaz

doi:10.1155/2018/5062960

Cited by 27 publications

(8 citation statements)

References 31 publications

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“…Table 7 and Table 8 respectively. The effective temperature range of QCA circuits is 1K to 6K, in this temperature range average output polarization for the QCA output cell is very minimum changed [35,33] and the above this range polarization is drastically reduced. The AOP calculated by the following Eq.…”

Section: Array Coordinates Map For Cell Energy Dissipationmentioning

confidence: 99%

“…18 for PG. [32,33]. The QD-E tool has one more special simulation engine available for calculation of Energy dissipation in eV, name as Coherence vector energy engine (w/Energy).…”

Section: Peres Logic Gate (Pg)mentioning

confidence: 99%

“…In this calculation we have considered the stander cell size of QCA cell is18 nm × 18 nm, quantum dot-diameter is 5 nm and the distance between two quantum cells is 20 nm for single layer design. In the Table 5, and Table 6, represented [33] the whole design energy dissipation for RLG-TG and RLG-PG respective. The total error of QCA cell is zero over an entire clock cycle of all energy movements is demonstrated in Eq.…”

Section: Peres Logic Gate (Pg)mentioning

confidence: 99%

“…The total error of QCA cell is zero over an entire clock cycle of all energy movements is demonstrated in Eq. ( 19) [33].…”

Section: Peres Logic Gate (Pg)mentioning

confidence: 99%

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WITHDRAWN: Optimal energy estimation of Toffoli and Peres gate design using quantum-dot cellular automata

Patidar¹,

Gupta²

2021

Preprint

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Quantum-dot cellular automata (QCA) are a novel dominant transistor-less computational nanotechnology. It is an appropriate candidate for the upcoming generation of quantum computational nano-electronics technology. The main objective of this research work is to present a QCA reversible logic circuits design such as the Toffoli gate (TG) and Peres gate (PG) and do the analysis of different parameters. In this paper, we propose a single layer coplanar method to solve this physical layout design and synchronization problem. The presented reversible logic gate (RLG) layout designs are implemented by Bijection functional algorithm for reduction of the number of QCA (quantum) cells, latency, and minimum design area. Also, the Optimized energy dissipation and effect of temperature on output polarization cell, of the proposed structure have been checked successfully using the tool QD-E (Energy) tool. The proposed QCA design has been verified by QCADesigner-E 2.2 tool using a bistable approximation and coherence vector engine. Finally, comparisons have been proposed RLG-TG and RLG-PG designs with the existing QCA design.

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Section: Array Coordinates Map For Cell Energy Dissipationmentioning

confidence: 99%

“…18 for PG. [32,33]. The QD-E tool has one more special simulation engine available for calculation of Energy dissipation in eV, name as Coherence vector energy engine (w/Energy).…”

Section: Peres Logic Gate (Pg)mentioning

confidence: 99%

Section: Peres Logic Gate (Pg)mentioning

confidence: 99%

“…The total error of QCA cell is zero over an entire clock cycle of all energy movements is demonstrated in Eq. ( 19) [33].…”

Section: Peres Logic Gate (Pg)mentioning

confidence: 99%

See 2 more Smart Citations

WITHDRAWN: Optimal energy estimation of Toffoli and Peres gate design using quantum-dot cellular automata

Patidar¹,

Gupta²

2021

Preprint

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“…From the above analysis of the existing RAM designs, the following observations are made, -Single port memory is designed with or without crossover in [19][20][21] The logical crossing method is used to construct XOR function [3], 2×1 multiplexer [25], Full Adder [26] and complex logical functions [24]. The incorporation of logical crossing in all these references reduces the number of cells and area in the QCA layout.…”

Section: Limitations Of the Existing Designmentioning

confidence: 99%

Multi-Port Memory Design in Quantum Cellular Automata Using Logical Crossing

2021

Informacije MIDEM

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Memory and its data communication play a vital role in deciding the performance of a Processor. In order to obtain a high performance computing machine, memory access has to be equally faster. In this paper, Dual port memory with Set/Reset is designed using Majority Voter in Quantum-dot Cellular Automata (QCA). Dual port memory consists of basic functional blocks such as 2 to 4 decoder, Control Logic Block (CLB), Address Checker Block (ACB), Memory Cell (MC), Data Router block and Input/Output block. These functional units are constructed using the 3-input majority voters. QCA is one of the recent technologies for the design of nanometer level digital components. The functionality of Dual Port Memory has been simulated and verified in QCADesigner 2.0.3. A novel crossover method called Logical Crossing is utilized to improve the area of the proposed design. The logical crossing does the data transmission with the support of proper Clock zone assignment. The logical crossing based QCA layouts are optimized in terms of area and number of cell counts. It is observed that 29.81%, 18.27%, 8.32%, 11.57% and 3.69% are the percentage of improvement in the number of cells in Decoder, ACB, CLB, Data Router and Memory Cell respectively. Also, 25.71%, 16.83%, 8.62%, 4.74% and 3.73% of improvement is achieved in the area for Decoder, ACB, CLB, Data Router and Memory Cell respectively. In addition to that the proposed Dual port memory using logical crossing attains improvement in the area by 8.26%; that is made possible due to the 8.65% reduction in the number of cells required for its construction. Moreover, the quantum circuits of the RAM are obtained using the RCViewer+ tool. The quantum cost, constant inputs, the number of gates, garbage output and total cost are estimated as 285, 67, 57, 50 and 516 respectively.

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Multioperative reversible gate design with implementation of 1‐bit full adder and subtractor along with energy dissipation analysis

Riyaz

Naz

Sharma

2020

Circuit Theory & Apps

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Summary Nanotechnology and very large‐scale integration (VLSI) fabrication have a reflective productivity. The growth of one demands the growth of the other. In nanotechnology, quantum‐dot cellular automata (QCA) secures as the best alternative for replacement of complementary metal‐oxide semiconductor (CMOS) technology for integrated circuit (IC) fabrication. This paper presents an integration of the two domains wherein a novel ultraefficient, multioperative 3 × 3 universal reversible gate, Sadat Farah Vijay (SFV)‐QCA, is proposed and implemented in QCA technology using majority voter approach. SFV‐QCA gate is redesigned and restructured using precise QCA cell interaction for optimization. The basic logic gates are implemented using the proposed SFV‐QCA gate to validate its universality. All the 13 standard Boolean functions are implemented using SFV‐QCA to demonstrate its multioperation nature. One‐bit full adder and subtractor circuits are designed using SFV‐QCA gate and compared with the previous works. The analysis of the SFV‐QCA gate shows that it is ultraefficient and more robust as compared to previous works. Energy dissipation analysis of the designs has also been presented, and the investigation establishes minimum energy dissipation of the designs that confirms ultrahigh efficient designs.

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An Architecture of 2-Dimensional 4-Dot 2-Electron QCA Full Adder and Subtractor with Energy Dissipation Study

Cited by 27 publications

References 31 publications

WITHDRAWN: Optimal energy estimation of Toffoli and Peres gate design using quantum-dot cellular automata

WITHDRAWN: Optimal energy estimation of Toffoli and Peres gate design using quantum-dot cellular automata

Multi-Port Memory Design in Quantum Cellular Automata Using Logical Crossing

Multioperative reversible gate design with implementation of 1‐bit full adder and subtractor along with energy dissipation analysis

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