An Analog Front-End for a Multifunction Sensor Employing a Weak-Inversion Biasing Technique With 26 nVrms, 25 aCrms, and 19 fArms Input-Referred Noise

Maruyama, Masahiko; Taguchi, Shigenari; Yamanoue, Masafumi; Iizuka, Kunihiko

doi:10.1109/jssc.2016.2581812

Cited by 35 publications

(21 citation statements)

References 12 publications

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“…Fig. 12 shows the measured input referred offset histogram of the ROIC, where it can be seen that the worst-case input referred offset is 5 µV, which is 200 times better than the performance of a previously reported ROIC [28]. Fig.…”

Section: Resultsmentioning

confidence: 88%

A low power read-out integrated circuit for multiple sensors

Huang

Wei

Wang

et al. 2020

IEICE Electron. Express

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This paper proposes a low power read-out integrated circuit (ROIC) for multiple sensors having a DC output signal. It comprises a chopper-stabilized instrumentation amplifier (CSIA) followed by a second-order incremental analog-to-digital converter (IADC). The CSIA has a dual-frequency path to effectively eliminate any 1/f noise and offset. A variable gain module (VGM) is also connected to the CSIA to improve its range of potential applications. A CMOS buffer amplifier followed by the CSIA is used to achieve the ROIC's linearity and drive capability. The back-end of the ROIC has a switchedcapacitor IADC to provide a digital output. The correlated double sampling (CDS) technique was used in the IADC's first integrator to reduce the offset and noise. The combination of these techniques enables the ROIC to achieve an input referred offset of 5 μV and a best error voltage of ±0.01 mV. The ROIC was implemented in 0.18 μm CMOS technology. It occupies an area of approximately 2.56 mm2 and consumes 835 μA of current from a 1.6 V of supply voltage.

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Section: Resultsmentioning

confidence: 88%

A low power read-out integrated circuit for multiple sensors

Huang

Wei

Wang

et al. 2020

IEICE Electron. Express

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“…However, the jitter requirement is relaxed by the relatively narrow signal band. The SNR jdac determined by the sampling clock jitter σ jdac is given by [1]…”

Section: Gated Ctmmentioning

confidence: 99%

“…W HEATSTONE bridges are widely used to read out impedance sensors that monitor physical parameters such as temperature, pressure, and humidity [1]- [12]. As shown in Fig.…”

Section: Introductionmentioning

confidence: 99%

An Energy-Efficient 3.7-nV/<inline-formula> <tex-math notation="LaTeX">$\surd$ </tex-math> </inline-formula>Hz Bridge Readout IC With a Stable Bridge Offset Compensation Scheme

Jiang

Nihtianov

Makinwa

2019

IEEE J. Solid-State Circuits

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This paper describes an energy-efficient bridge readout IC (ROIC), which consists of a capacitively coupled instrumentation amplifier (CCIA) that drives a continuous-time delta-sigma modulator (CTM). By exploiting the CCIA's ability to block dc common-mode voltages, the bridge's bias voltage may exceed the ROIC's supply voltage, allowing these voltages to be independently optimized. Since bridge output is typically much smaller than bridge offset, a digital to analog converter (DAC) is used to compensate this offset before amplification and thus increase the CCIA's useful dynamic range. Bridge loading is reduced by using a dual-path positive feedback scheme to boost the CCIA's input impedance. Furthermore, the CCIA's output is gated to avoid digitizing its output spikes, which would otherwise limit the ROIC's linearity and stability. The ROIC achieves an input-referred noise density of 3.7 nV/ √ Hz, a noise efficiency factor (NEF) of 5, and a power efficiency factor (PEF) of 44, which both represent the state of the art. A pressure sensing system, built with the ROIC and a differential pressure sensor (AC4010), achieves 10.1-mPa (1σ) resolution in a 0.5-ms conversion time. The ROIC dissipates about 30% of the system's power dissipation and contributes about 6% of its noise power. To reduce the sensor's offset drift, a temperature compensation scheme based on an external reference resistor is used. After a two-point calibration, this scheme reduces bridge offset drift by 80× over a 50°C range. Index Terms-Beyond the rails, bridge offset compensation, bridge sensor, capacitively coupled (CC) chopper, CC instrumentation amplifier (CCIA), continuous-time delta-sigma modulator (CTM), energy efficient, readout IC (ROIC), temperature compensation. This article has been accepted for inclusion in a future issue of this journal. Content is final as presented, with the exception of pagination.

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“…According to [21], PMOS and NMOS devices have a lower noise contribution in the weak inversion region for low frequencies (1 mHz to 100 Hz) compared to strong inversion. However, Equation 2suggests strong inversion biasing for a low thermal noise contribution for NMOS load devices in the OTA.…”

Section: State-of-the-art Biopotential Low-noise Amplifiersmentioning

confidence: 99%

A 0.5 V 68 nW ECG Monitoring Analog Front-End for Arrhythmia Diagnosis

Kosari

Breiholz

Liu

et al. 2018

JLPEA

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This paper presents a power efficient analog front-end (AFE) for electrocardiogram (ECG) signal monitoring and arrhythmia diagnosis. The AFE uses low-noise and low-power circuit design methodologies and aggressive voltage scaling to satisfy both the low power consumption and low input-referred noise requirements of ECG signal acquisition systems. The AFE was realized with a three-stage fully differential AC-coupled amplifier, and it provides bio-signal acquisition with programmable gain and bandwidth. The AFE was implemented in a 130 nm CMOS process, and it has a measured tunable mid-band gain from 31 to 52 dB with tunable low-pass and high-pass corner frequencies. Under only 0.5 V supply voltage, it consumes 68 nW of power with an input-referred noise of 2.8 µVrms and a power efficiency factor (PEF) of 3.9, which makes it very suitable for energy-harvesting applications. The low-noise 68nW AFE was also integrated on a self-powered physiological monitoring System on Chip (SoC) that is used to capture ECG bio-signals. Heart rate extraction (R-R) detection algorithms were implemented and utilized to analyze the ECG data received by the AFE, showing the feasibility of <100 nW AFE for continuous ECG monitoring applications.

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An Analog Front-End for a Multifunction Sensor Employing a Weak-Inversion Biasing Technique With 26 nVrms, 25 aCrms, and 19 fArms Input-Referred Noise

Cited by 35 publications

References 12 publications

A low power read-out integrated circuit for multiple sensors

A low power read-out integrated circuit for multiple sensors

An Energy-Efficient 3.7-nV/<inline-formula> <tex-math notation="LaTeX">$\surd$ </tex-math> </inline-formula>Hz Bridge Readout IC With a Stable Bridge Offset Compensation Scheme

A 0.5 V 68 nW ECG Monitoring Analog Front-End for Arrhythmia Diagnosis

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