An accurate method for predicting temperature-dependent current mismatch in weak inversion region of long and wide channel MOSFET without subthreshold hump

Abstract

We have found and verified that the current mismatch σ(ΔI/I) in the weak inversion region can be accurately predicted on the basis of the transconductance efficiency g m /I when a MOSFET does not have a subthreshold hump. We have also verified that, in a relatively long and wide channel MOSFET, the value of gate-voltage mismatch σ(ΔI/g m )(LW) 1/2 in the weak inversion region converges to a constant value, regardless of the channel size and temperature. The constant value is determined by the MOSFET structure. In our method, both the convergence value of σ(ΔI/g m )(LW) 1/2 in the weak inversion region and the g m /I behavior are used as input information of the σ(ΔI/I) prediction. It is possible to take this constant convergence value as an approximate value of σ(ΔI/g m )(LW) 1/2 , also in the moderate inversion region. Using this value, our method of σ(ΔI/I) prediction can be applied to the moderate inversion region with a reasonable degree of accuracy. In addition, a method for improving the accuracy of the predictions in the strong inversion region will be presented. We will discuss the mechanism that causes the value of σ(ΔI/g m )(LW) 1/2 in the weak inversion region to become a constant value. On the other hand, when a MOSFET has a subthreshold hump, the constant value approximation of σ(ΔI/g m )(LW) 1/2 in the weak inversion region cannot be used. The value of σ(ΔI/g m )(LW) 1/2 in weak and moderate inversion regions increases with a decrease in current. This increase randomly fluctuates depending on the wafer or temperature. As a result, to predict the current mismatch σ(ΔI/I) accurately, it is necessary to remove the subthreshold hump of a MOSFET completely.

Improvement of radiation response of SiC MOSFETs under high temperature and humidity conditions

“…The formation of current humps was previously reported for irradiated silicon MOSFETs 21,22) or CMOS technology. [23][24][25][26] Although its origin is still controversial, this effect was interpreted in terms of charges accumulated in insulators rather than the gate oxide. [22][23][24][25] For example, when n-channel commercial power Si MOSFETs were irradiated at RT, accumulated charges in the surrounding field oxide (a thicker oxide than the gate oxide) formed a parasitic bias.…”