An 8Mb demonstrator for high-density 1.8V Phase-Change Memories

Bedeschi, F.; Resta, Claudio; Khouri, O.; Buda, E.; Costa, L.; Ferraro, Marco; Pellizzer, F.; Ottogalli, F.; Pirovano, A.; Tosi, M.; Bez, R.; Gastaldi, R.; Casagrande, G.

doi:10.1109/vlsic.2004.1346644

Cited by 69 publications

(35 citation statements)

References 4 publications

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“…PCM cells can be organized into an array structure much like that of DRAM [3]. Thus, it is possible to manufacture a PCM DIMM that operates in much the same way as an existing DRAM DIMM, albeit with different timing parameters and access scheduling constraints [9].…”

Section: Phase Change Memorymentioning

confidence: 99%

Better I/O through byte-addressable, persistent memory

Condit

Nightingale

Frost

et al. 2009

Proceedings of the ACM SIGOPS 22nd Symposium on Operating Systems Principles

693

456

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Modern computer systems have been built around the assumption that persistent storage is accessed via a slow, block-based interface. However, new byte-addressable, persistent memory technologies such as phase change memory (PCM) offer fast, fine-grained access to persistent storage.In this paper, we present a file system and a hardware architecture that are designed around the properties of persistent, byteaddressable memory. Our file system, BPFS, uses a new technique called short-circuit shadow paging to provide atomic, fine-grained updates to persistent storage. As a result, BPFS provides strong reliability guarantees and offers better performance than traditional file systems, even when both are run on top of byte-addressable, persistent memory. Our hardware architecture enforces atomicity and ordering guarantees required by BPFS while still providing the performance benefits of the L1 and L2 caches.Since these memory technologies are not yet widely available, we evaluate BPFS on DRAM against NTFS on both a RAM disk and a traditional disk. Then, we use microarchitectural simulations to estimate the performance of BPFS on PCM. Despite providing strong safety and consistency guarantees, BPFS on DRAM is typically twice as fast as NTFS on a RAM disk and 4-10 times faster than NTFS on disk. We also show that BPFS on PCM should be significantly faster than a traditional disk-based file system.

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Section: Phase Change Memorymentioning

confidence: 99%

Better I/O through byte-addressable, persistent memory

Condit

Nightingale

Frost

et al. 2009

Proceedings of the ACM SIGOPS 22nd Symposium on Operating Systems Principles

693

456

View full text Add to dashboard Cite

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“…Density predictions are from the International Technology Roadmap for Semiconductors (ITRS) [15] for 2015. Latencies for PCM and STTM are from [34] and [4], while DRAM and flash values are taken from typical datasheets. In addition to flash memory, which has entered wide use, we consider two advanced non-volatile memories: phase change memory (PCM) and spin-torque transfer memory (STTM).…”

Section: Non-volatile Memoriesmentioning

confidence: 99%

Understanding the Impact of Emerging Non-Volatile Memories on High-Performance, IO-Intensive Computing

Caulfield

Coburn

Mollov

et al. 2010

2010 ACM/IEEE International Conference for High Performance Computing, Networking, Storage and Analysis

115

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Abstract-Emerging storage technologies such as flash memories, phase-change memories, and spin-transfer torque memories are poised to close the enormous performance gap between disk-based storage and main memory. We evaluate several approaches to integrating these memories into computer systems by measuring their impact on IO-intensive, database, and memory-intensive applications. We explore several options for connecting solid-state storage to the host system and find that the memories deliver large gains in sequential and random access performance, but that different system organizations lead to different performance trade-offs. The memories provide substantial application-level gains as well, but overheads in the OS, file system, and application can limit performance. As a result, fully exploiting these memories' potential will require substantial changes to application and system software. Finally, paging to fast non-volatile memories is a viable option for some applications, providing an alternative to expensive, powerhungry DRAM for supporting scientific applications with large memory footprints.

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“…Electrical characterization data have been obtained on 512 kb cell populations of 8 Mb PCM test chips in 180 nm technology with a l-trench structure connected with a BJT selector [5]. Writing operations on the memory array have been performed with a dedicated Automated Test Equipment (ATE) capable of applying fully arbitrary waveforms (V SET and V RESET in Fig.…”

Section: Methodsmentioning

confidence: 99%