An 8Mb 1T1C ferroelectric memory with zero cancellation and micro-granularity redundancy

Reliability of Ferroelectric Random Access memory embedded within 130nm CMOS

“…Consequently, every read operation is followed by a data restore. Additional FRAM circuit operation details are available in literature reports as found in [3], [4] and [5]. …”

“…The FRAM device was designed to operate in an 8Mb, 1T-1C or 4Mb, 2T-2C mode [3]. In this work we evaluated the memory reliability operating as a 4Mb, 2T-2C device.…”

Manufacturable High-Density 8 Mbit One Transistor–One Capacitor Embedded Ferroelectric Random Access Memory

“…The features of the 8 Mbit eFRAM device 15) are highlighted through the optical micrograph displayed in Fig. 2.…”

“…3-5 involved no bit repairs since the intent was to evaluate the effect of process improvements. In an actual device, the flexible redundancy scheme 15) permits removal of 16 defective row pairs, 32 defective columns and up to 128 defective or weak bits. The initial electrical properties of this full bit functional 8 Mbit device have been reported in ref.…”

Resistance switching for RRAM applications

“…At this point, the largest array that has been demonstrated was a 64 Mb 4-layer stacked conductive metal oxide (CMOx) memory [8]. This is to be compared with Samsung's 512 Mb PCM demonstrated in 2006 [10], or the recently announced 128 Mb Omneo PCM product from Numonyx [11], as well as the 16 Mb MRAM from Everspin [12], and the 8 Mb FeRAM product already available from Ramtron [13]. It is an indication that RRAM like other alternative NVM technologies, still has some way to go before competing with NAND Flash or DRAM on the high Gb-scale.…”