An 87-$\hbox{mA}\cdot \min$ Iontophoresis Controller IC With Dual-Mode Impedance Sensor for Patch-Type Transdermal Drug Delivery System

Song, Kiseok; Ha, Unsoo; Lee, Jae-Hyuk; Bong, Kyeongryeol; Yoo, Hoi‐Jun

doi:10.1109/jssc.2013.2282090

Cited by 19 publications

(12 citation statements)

References 16 publications

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“…A dual-mode EIS can also be potentially employed to measure cellular behaviour at the electrode interface and at a distance from the surface of the electrodes [ 39 ] and to generate cellular impedance tomographic maps [ 28 ]. This system compares favourably to previous dual-mode systems [ 25 , 26 , 27 ]. It achieves high linearity, wideband operation and wide dynamic range and provides a potential cost-effective interface for several EIS applications.…”

Section: Discussionmentioning

confidence: 74%

“…Conventional EIS systems are designed for either voltage-mode measurements [ 17 , 20 , 21 ] or current-mode measurements [ 22 , 23 , 24 ]. Previous efforts in the design of flexible dual-mode systems are limited to the use of discrete units [ 25 , 26 ] or have been designed to detect small changes in solution or electrode impedance [ 27 ]. This paper presents the design of a multi-channel dual-mode analogue front-end (AFE) for EIS and bioimpedance analysis, which integrates two readout units for both bipolar (current-mode) and tetrapolar (voltage-mode) measurements.…”

Section: Introductionmentioning

confidence: 99%

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Wideband Fully-Programmable Dual-Mode CMOS Analogue Front-End for Electrical Impedance Spectroscopy

Valente

Demosthenous

2016

Sensors

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This paper presents a multi-channel dual-mode CMOS analogue front-end (AFE) for electrochemical and bioimpedance analysis. Current-mode and voltage-mode readouts, integrated on the same chip, can provide an adaptable platform to correlate single-cell biosensor studies with large-scale tissue or organ analysis for real-time cancer detection, imaging and characterization. The chip, implemented in a 180-nm CMOS technology, combines two current-readout (CR) channels and four voltage-readout (VR) channels suitable for both bipolar and tetrapolar electrical impedance spectroscopy (EIS) analysis. Each VR channel occupies an area of 0.48 mm2, is capable of an operational bandwidth of 8 MHz and a linear gain in the range between −6 dB and 42 dB. The gain of the CR channel can be set to 10 kΩ, 50 kΩ or 100 kΩ and is capable of 80-dB dynamic range, with a very linear response for input currents between 10 nA and 100 sans-serifμA. Each CR channel occupies an area of 0.21 mm2. The chip consumes between 530 sans-serifμA and 690 sans-serifμA per channel and operates from a 1.8-V supply. The chip was used to measure the impedance of capacitive interdigitated electrodes in saline solution. Measurements show close matching with results obtained using a commercial impedance analyser. The chip will be part of a fully flexible and configurable fully-integrated dual-mode EIS system for impedance sensors and bioimpedance analysis.

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Section: Discussionmentioning

confidence: 74%

Section: Introductionmentioning

confidence: 99%

Wideband Fully-Programmable Dual-Mode CMOS Analogue Front-End for Electrical Impedance Spectroscopy

Valente

Demosthenous

2016

Sensors

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“…Many of such current DACs use the cascode current-source structures to have an high output impedance [48], [53]- [57], [70], [77]. Among them, there are two advanced current mirrors with higher output impedance than the typical cascode structures: a regulated cascode structure [71] and a triple cascode structure [74]. The regulated cascode structure biases its cascode transistor through a negative feedback using an amplifier.…”

Section: A Open-loop Current Driversmentioning

confidence: 99%

On-Chip Sinusoidal Signal Generators for Electrical Impedance Spectroscopy: Methodological Review

Kweon¹,

Rafi

Cheon

et al. 2022

IEEE Trans. Biomed. Circuits Syst.

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This paper reviews architectures and circuit implementations of on-chip sinusoidal signal generators (SSGs) for electrical impedance spectroscopy (EIS) applications. In recent years, there have been increasing interests in on-chip EIS systems, which measure a target material's impedance spectrum over a frequency range. The on-chip implementation allows EIS systems to have low power and small form factor, enabling various biomedical applications. One of the key building blocks of on-chip EIS systems is on-chip SSG, which determines the frequency range and the analysis precision of the whole EIS system. On-chip SSGs are generally required to have high linearity, wide frequency range, and high power and area efficiency. They are typically composed of three stages in general: waveform generation, linearity enhancement, and current injection. First, a sinusoidal waveform should be generated in SSGs. The generated waveform's frequency should be accurately adjustable over a wide range. The firstly generated waveform may not be perfectly linear, including unwanted harmonics. In the following linearity-enhancement step, these harmonics are attenuated by using filters typically. As the linearity of the waveform is improved, the precision of the EIS system gets ensured. Lastly, the filtered voltage waveform is now converted to a current by a current driver. Then, the current sinusoidal signal is injected into the target impedance. This review discusses the principles, advantages, and disadvantages of various techniques applied to each step in state-of-the-art on-chip SSGs. In addition, state-of-the-art designs are compared and summarized.

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“…The amplitude of the current is determined by a 5-bit current DAC, which can be programmed from 16 to 512 μA. A timing control block generates different frequencies in the range of DC–500 Hz from a nominal 16 kHz clock that can be calibrated through a 3-bit capacitor bank [11]. The output impedance of the system is:Rout=Aogm2ro2ro1 where A o is the open loop gain of feedback amplifier, g m 2 is the transconductance of M2, and r o 1 and r o 2 are the output resistance of transistor M1 and M2, respectively.…”

Section: Current Driver Designsmentioning

confidence: 99%

“…The current driver in [ 11 ] provides a current source and current sink from a 3.3 V supply. The schematic of the current driver is shown in Figure 5 .…”

Section: Current Driver Designsmentioning

confidence: 99%

Analog Integrated Current Drivers for Bioimpedance Applications: A Review

Neshatvar

Langlois

Bayford

et al. 2019

Sensors

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An important component in bioimpedance measurements is the current driver, which can operate over a wide range of impedance and frequency. This paper provides a review of integrated circuit analog current drivers which have been developed in the last 10 years. Important features for current drivers are high output impedance, low phase delay, and low harmonic distortion. In this paper, the analog current drivers are grouped into two categories based on open loop or closed loop designs. The characteristics of each design are identified.

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An 87-$\hbox{mA}\cdot \min$ Iontophoresis Controller IC With Dual-Mode Impedance Sensor for Patch-Type Transdermal Drug Delivery System

Cited by 19 publications

References 16 publications

Wideband Fully-Programmable Dual-Mode CMOS Analogue Front-End for Electrical Impedance Spectroscopy

Wideband Fully-Programmable Dual-Mode CMOS Analogue Front-End for Electrical Impedance Spectroscopy

On-Chip Sinusoidal Signal Generators for Electrical Impedance Spectroscopy: Methodological Review

Analog Integrated Current Drivers for Bioimpedance Applications: A Review

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