Wireless power transfer systems, particularly those based on inductive coupling, provide an increasingly attractive method to safely deliver power to biomedical implants. Although there exists a large body of literature describing the design of inductive links, it generally focuses on single aspects of the design process. There is a variety of approaches, some analytic, some numerical, each with benefits and drawbacks. As a result, undertaking a link design can be a difficult task, particularly for a newcomer to the subject. This tutorial paper reviews and collects the methods and equations that are required to design an inductive link for biomedical wireless power transfer, with a focus on practicality. It introduces and explains the published methods and principles relevant to all aspects of inductive link design, such that no specific prior knowledge of inductive link design is required. These methods are also combined into a software package (the Coupled Coil Configurator), to further simplify the design process. This software is demonstrated with a design example, to serve as a practical illustration.

A significant problem with clinical deep brain stimulation (DBS) is the high variability of its efficacy and the frequency of side effects, related to the spreading of current beyond the anatomical target area. This is the result of the lack of control that current DBS systems offer on the shaping of the electric potential distribution around the electrode. This paper presents a stimulator ASIC with a tripolar current-steering output stage, aiming at achieving more selectivity and field shaping than current DBS systems. The ASIC was fabricated in a 0.35-μ m CMOS technology occupying a core area of 0.71 mm(2). It consists of three current sourcing/sinking channels. It is capable of generating square and exponential-decay biphasic current pulses with five different time constants up to 28 ms and delivering up to 1.85 mA of cathodic current, in steps of 4 μA, from a 12 V power supply. Field shaping was validated by mapping the potential distribution when injecting current pulses through a multicontact DBS electrode in saline.

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Powering of medical implants by inductive coupling is an effective technique, which avoids the use of bulky implanted batteries or transcutaneous wires. On the external unit side, class-D and class-E power amplifiers (PAs) are conventionally used, thanks to their high efficiency at high frequencies. The initial specifications driving this study require the use of multiple independent stimulators, which imposes serious constraints on the area and functionality of the external unit. An integrated circuit class-D PA has been designed to provide both small area and enhanced functionality, the latter achieved by the addition of an on-chip (PLL) a dead-time generator and a phase detector. The PA was designed in a 0.18-μm CMOS high-voltage process technology and occupies an area of 9.86 mm 2 . It works at frequencies up to 14 MHz and 30-V supply and efficiencies higher than 80% are obtained at 14 MHz. The PA is intended for a closed-loop transmitter system that optimizes power delivery to medical implants.

This paper presents a multi-channel dual-mode CMOS analogue front-end (AFE) for electrochemical and bioimpedance analysis. Current-mode and voltage-mode readouts, integrated on the same chip, can provide an adaptable platform to correlate single-cell biosensor studies with large-scale tissue or organ analysis for real-time cancer detection, imaging and characterization. The chip, implemented in a 180-nm CMOS technology, combines two current-readout (CR) channels and four voltage-readout (VR) channels suitable for both bipolar and tetrapolar electrical impedance spectroscopy (EIS) analysis. Each VR channel occupies an area of 0.48 mm2, is capable of an operational bandwidth of 8 MHz and a linear gain in the range between −6 dB and 42 dB. The gain of the CR channel can be set to 10 kΩ, 50 kΩ or 100 kΩ and is capable of 80-dB dynamic range, with a very linear response for input currents between 10 nA and 100 sans-serifμA. Each CR channel occupies an area of 0.21 mm2. The chip consumes between 530 sans-serifμA and 690 sans-serifμA per channel and operates from a 1.8-V supply. The chip was used to measure the impedance of capacitive interdigitated electrodes in saline solution. Measurements show close matching with results obtained using a commercial impedance analyser. The chip will be part of a fully flexible and configurable fully-integrated dual-mode EIS system for impedance sensors and bioimpedance analysis.

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Inductive powering for implanted medical devices, such as implantable biosensors, is a safe and effective technique that allows power to be delivered to implants wirelessly, avoiding the use of transcutaneous wires or implanted batteries. Wireless powering is very sensitive to a number of link parameters, including coil distance, alignment, shape, and load conditions. The optimum drive frequency of an inductive link varies depending on the coil spacing and load. This paper presents an optimum frequency tracking (OFT) method, in which an inductive power link is driven at a frequency that is maintained at an optimum value to ensure that the link is working at resonance, and the output voltage is maximised. The method is shown to provide significant improvements in maintained secondary voltage and system efficiency for a range of loads when the link is overcoupled. The OFT method does not require the use of variable capacitors or inductors. When tested at frequencies around a nominal frequency of 5 MHz, the OFT method provides up to a twofold efficiency improvement compared to a fixed frequency drive. The system can be readily interfaced with passive implants or implantable biosensors, and lends itself to interfacing with designs such as distributed implanted sensor networks, where each implant is operating at a different frequency.

Short-range, low-power, high data-rate telemetry is an increasingly desirable feature for implantable medical devices (IMDs), and is commonly implemented using an inductive link. Pulse Harmonic Modulation (PHM) provides the desired high data rates and low power consumption, but requires precise pulse timing. This paper presents a modification of PHM, Single-Pulse Harmonic Modulation (SPHM), which offers reduced power consumption and lower implementation complexity. In order to test the SPHM concept, transmitter and receiver circuits were designed in 0.35µm CMOS and simulated. The simulated results suggest that the circuits can transceive data at 50Mb/s, consuming 1.49pJ/b and 2.59pJ/b at the transmitter and receiver respectively, from a 1.2V supply.