An 80 mV-Swing Single-Ended Duobinary Transceiver With a TIA RX Termination for the Point-to-Point DRAM Interface

Lee, Soo-Min; Yi, Il-Min; Jung, Hae-Kang; Lee, Hyunbae; Kim, Yong-Ju; Kim, Yunsaing; Kim, Byungsub; Sim, Jae‐Yoon; Park, Hong-June

doi:10.1109/jssc.2014.2359665

Cited by 24 publications

(1 citation statement)

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“…Previous duobinary TXs [1,4] were implemented by current-mode drivers with differential signalling which may not be suitable for a DRAM interface. A single-ended current-mode duobinary TX operating up to 7 Gbps is presented in [5], but a precoder was not implemented. As mentioned earlier, considering the bus idle time of a DRAM interface, a precoder is required and stringent timing constraint in the feedback loop should be considered for the higher data-rate operation.…”

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Single‐ended voltage‐mode duobinary transmitter with feedback time reduced parallel precoder

Chae

Kim

2018

Electron. lett.

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A duobinary transmitter (TX) is presented in a single-ended topology using voltage-mode drivers to support dynamic random access memory (DRAM) interface. A four-phase parallel duobinary precoder is included. It relaxes one of the critical timing requirements of the duobinary TX by reducing the feedback step of the precoder and performing its feedback at once. Fabricated in a 55 nm CMOS process, the TX occupies 0.053 mm 2 active area. The TX achieves 10 Gbps operation at 6.8 pJ/b of energy efficiency and operates up to 12.8 Gbps at 7.6 pJ/b.

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confidence: 99%