AMULET1: a micropipelined ARM

Furber, Steve; Day, P.; Garside, Jim; Paver, N.C.; Woods, J.V.

doi:10.1109/cmpcon.1994.282880

Cited by 54 publications

(34 citation statements)

References 4 publications

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“…A group at the University of Manchester has built a number of versions of a self-timed micropipelined VLSI implementation of the ARM processor [26] which is an extremely power-efficient commercial microprocessor. The first-generation Amulet design is within a factor of two of the commercial ARM of the same time [56].…”

Section: Asynchronous Processorsmentioning

confidence: 99%

Practical advances in asynchronous design and in asynchronous/synchronous interfaces

Brunvand

Nowick

Yun

1999

Proceedings of the 36th Annual ACM/IEEE Design Automation Conference

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Section: Asynchronous Processorsmentioning

confidence: 99%

Practical advances in asynchronous design and in asynchronous/synchronous interfaces

Brunvand

Nowick

Yun

1999

Proceedings of the 36th Annual ACM/IEEE Design Automation Conference

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“…The design of AMULET1 [3,6,7] begins from a consideration of the environment in which the processor will be used and the interfaces through which the processor should communicate with that environment. For instance, should the chip be designed to use an existing interface so that it can plug into an existing environment?…”

Section: A Micropipelined Armmentioning

confidence: 99%

Computing without Clocks: Micropipelining the ARM Processor

Furber

1995

Asynchronous Digital Circuit Design

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High-performance VLSI microprocessors are becoming very power hungry; this presents an increasing problem of heat removal in desk-top machines and of battery life in portable machines. Asynchronous operation is proposed as a route to more energy efficient computing. In his 1988 Turing Award Lecture, Ivan Sutherland proposed a modular approach to asynchronous design based on "Micropipelines". The AMULET group at Manchester University has developed an asynchronous implementation of the ARM microprocessor based on micropipelines as part of a broad investigation into low power techniques. The design is described in detail, the rationale for the work is presented and the characteristics of the chip described. The first silicon from the design arrived in April 1994 and an evaluation of it is presented here.

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“…In AMULET1 [5] operations are issued in order and dependencies resolved by waiting for register updates using register locking [9]. Although functional this is slow -producing frequent dependency stalls -and the locking mechanism increases the register read cycle time.…”

Section: 1: Earlier Asynchronous Dependency Avoidance Techniquesmentioning

confidence: 99%