Computing without Clocks: Micropipelining the ARM Processor

Abstract

High-performance VLSI microprocessors are becoming very power hungry; this presents an increasing problem of heat removal in desk-top machines and of battery life in portable machines. Asynchronous operation is proposed as a route to more energy efficient computing. In his 1988 Turing Award Lecture, Ivan Sutherland proposed a modular approach to asynchronous design based on "Micropipelines". The AMULET group at Manchester University has developed an asynchronous implementation of the ARM microprocessor based on micropipelines as part of a broad investigation into low power techniques. The design is described in detail, the rationale for the work is presented and the characteristics of the chip described. The first silicon from the design arrived in April 1994 and an evaluation of it is presented here.

Interacting Self-Timed Pipelines and Elementary Coupling Control Modules

“…That is, interaction control should be localized between corresponding stages of two pipelines. Although, fork and join controls [5] have been used to connect and control the pipelines, they are not assumed to be used within the same stage and thus the transfer control may spread over several stages. For instance, a bi-directional control should be realized by two join stages followed by two fork stages in order to realize the simultaneous transfer controls A b → A m and B b → B m .…”

MOUSETRAP: High-Speed Transition-Signaling Asynchronous Pipelines

“…One technique is to simply use an inverter chain, or a chain of transmission gates; the number of gates and their transistor sizing determines the total delay. A more accurate technique duplicates the worst-case critical path of the logic block, and uses that as a delay line [10]. If the duplicated critical path is placed in close proximity to the logic block, it can provide good delay tracking even for a wide variation in environmental and process variations.…”

Power minimization in IC design

“…For some applications, such as a compact digital cassette error corrector chip set, the performance requirements are easily met and the low-power advantages of completely asynchronous design have yielded an energy savings of up to a factor of five compared with synchronous counterparts [10]. In addition, the ongoing project to implement a fully compatible low-power asyn-chronous ARM microprocessor has had promising results [45].…”