Amorphous Indium Gallium Zinc Oxide Semiconductor Thin Film Transistors Using O₂ Plasma Treatment on the SiN_x Gate Insulator

Abstract

The characterization of metallic electrodes in semiconducting devices with high spatial resolution has become increasingly important. In paticular, the evaluation of metal-metal interactions has been of vital importance in various technologies. Scanning force microscopy (SFM) enables us to observe surface topographies on a nanometer scale along with local mechanical properties such as friction force without any special surface treatment. It has been difficult to obtain high resolutions using conventional methods such as Auger electron spectroscopy, because of their beam size. In this study, we demonstrated the possibility of two dimensional metal mapping of mechanical properties by magnetic force controlled-atomic force microscopy (MFC-AFM), and a new force modulation method to determine the two metals. The Au-Ni system of metallic electrodes is one such example. Here, we also attempted to differentiate mapping of compositional inorganic materials such as Au islands, deposited on a flat Ni substrate. The Hertzian radius is 13.2 nm for Ni, and 23 nm for Au. We estimate the tip-sample deformation to be 2.9 nm for Au, and 0.97 nm for Ni, respectively.

Investigation of the Low-Frequency Noise Behavior and Its Correlation with the Subgap Density of States and Bias-Induced Instabilities in Amorphous InGaZnO Thin-Film Transistors with Various Oxygen Flow Rates

“…This phenomenon is believed to be caused by the more severe ion bombardment during the sputtering in higher oxygen flow rate environment. 13,14) The obtained result is consistent with the suggested LFN increase mechanism in higher oxygen flow rate devices in Fig. 3, and shows that the LFN in the subthreshold regime is deeply correlated with the subgap DOSs in a-IGZO TFTs.…”

Effects of electron trapping and interface state generation on bias stress induced in indium–gallium–zinc oxide thin-film transistors

“…[1][2][3][4][5] Although a-IGZO TFTs offer excellent performance, electrical instability issues, such as threshold voltage (V TH ) shift under gate bias temperature stress (BTS), negative effect of light exposure, and degradation by hot carriers in the operating mode, still remain. [6][7][8][9][10][11][12][13][14][15][16] The V TH shift under gate bias stress due to charge trapping and detrapping in the gate insulator or at the insulator/channel interface has been reported. [17][18][19] Much attention has been paid to such V TH shift, but the physical mechanisms of electron trapping and degradation have not been investigated in detail.…”

Effect of Fluorine in a Gate Insulator on the Reliability of Indium-Gallium-Zinc Oxide Thin-Film Transistors

“…7 Although several attempts to reduce the interface state by plasma treatment on a gate insulator have been reported, a strategy for eliminating the interface state between a-IGZO and the GI has yet to be established. 8,9 Therefore, the establishment of a method to form TFTs with fewer electron-trapping states and elucidation of the mechanism involved in reducing these states could lead to more reliable TFTs.…”