Effects of electron trapping and interface state generation on bias stress induced in indium–gallium–zinc oxide thin-film transistors

Abstract

The electrical characteristics of bias temperature stress (BTS) induced in amorphous indium-gallium-zinc oxide thin-film transistors (a-IGZO TFTs) were studied. We analyzed the threshold voltage (V TH ) shift on the basis of the effects of positive bias temperature stress (PBTS) and negative bias temperature stress (NBTS), and applied it to the stretched-exponential model. Both stress temperature and bias are considered as important factors in the electrical instabilities of a-IGZO TFTs, and the stretched-exponential equation is well fitted to the stress condition. V TH for the drain current-gate voltage (I DS -V GS ) curve and flat-band voltage (V FB ) for the capacitance-voltage (C-V) curve move in the positive direction when PBTS is induced. However, in the case of NBTS, they move slightly in the negative direction. To clarify the V TH shift phenomenon by electron and hole injection, the average effective energy barrier (E τ ) is extracted, and the extracted values of E τ under PBTS and NBTS are about 1.33 and 2.25 eV, respectively. The oxide trap charges (N ot ) of PBTS and NBTS calculated by C-V measurement are 4.4 ' 10 11 and 1.49 ' 10 11 cm %2 , respectively. On the other hand, the border trap charges of PBTS and NBTS are 6.7 ' 10 8 and 1.7 ' 10 9 cm %2 , respectively. This indicates that the increased interface trap charge, after PBTS is induced, captures electrons during detrap processing from the border trap to the conduction band, valence band, and interface trap.

Experimental decomposition of the positive bias temperature stress-induced instability in self-aligned coplanar InGaZnO thin-film transistors and its modeling based on the multiple stretched-exponential functions

“…Effective energy barrier values E a,shallow = 0.40 eV and E a,deep = 0.90 eV is in good agreement with values from studies where charge trapping was the dominant mechanism, where E a values range from 0.38 to 1.33 eV. 17,18 On the other hand, it is noteworthy that the extracted E a,DOS = 0.75 eV coincides with the energy difference between the calculated oxygen interstitial (O i ) level and the Fermi-level under PBTS. 15 Considering the activation energy for the peroxide dissociation through electron trapping has been calculated to be 0.8-0.9 eV, 15,16 the extracted E a, DOS = 0.75 eV is well within range of previously reported values lending confidence to the proposed method to partition the ΔV T,DOS component.…”

“…(b). Effective energy barrier values E a,shallow = 0.40 eV and E a,deep = 0.90 eV is in good agreement with values from studies where charge trapping was the dominant mechanism, where E a values range from 0.38 to 1.33 eV . On the other hand, it is noteworthy that the extracted E a,DOS = 0.75 eV coincides with the energy difference between the calculated oxygen interstitial (O i ) level and the Fermi‐level under PBTS .…”

Designing buried-gate InGaZnO transistors for high-yield and reliable switching characteristics

“…Density of deep energy level states in the sub-gap of IGZO is strongly subjected to interface trap density. 32–35 Electrons trapped at deep level states are released under the application of negative gate voltage during cycling test, leading to gradual negative shift of the threshold voltage. Thus, compared to the buried gate transistor device, larger negative threshold voltage shift was attributed to the higher interface trap density in the control-gate device.…”