Alumina etch masks for fabrication of high-aspect-ratio silicon micropillars and nanopillars

Abstract

We introduce using sputtered aluminum oxide (alumina) as a resilient etch mask for fluorinated silicon reactive ion etches. Achieving selectivity of 5000:1 for cryogenic silicon etching and 68:1 for SF(6)/C(4)F(8) silicon etching, we employ this mask for fabrication of high-aspect-ratio silicon micropillars and nanopillars. Nanopillars with diameters ranging from below 50 nm up to several hundred nanometers are etched to heights greater than 2 microm. Micropillars of 5, 10, 20, and 50 microm diameters are etched to heights of over 150 microm with aspect ratios greater than 25. Processing and characterization of the sputtered alumina is also discussed.

Controllable deformation of silicon nanowires with strain up to 24%

“…The fabrication of the nanowires follows Henry et al 24 pillars were defined by e-beam patterning an array of 30-150 nm disks in 75 nm of Micro-Chem PMMA 950 A2. A 25 nm layer of Al 2 O 3 was deposited as a hard-mask via dc magnetron sputtering of aluminum with a 5:1 Ar: O 2 process chemistry and patterned via lift-off.…”

“…A 25 nm layer of Al 2 O 3 was deposited as a hard-mask via dc magnetron sputtering of aluminum with a 5:1 Ar: O 2 process chemistry and patterned via lift-off. Aluminum oxide has been demonstrated as a resilient as well as chemically inert etch mask 24 providing a selectivity of greater than 60:1 for a fluorine etch chemistry. Etching was performed in an Oxford Plasmalab 100 ICP-RIE 380 machine running a "Pseudo Bosch" etch with simultaneous etching using SF 6 and passivation using C 4 F 8 -so-called mixed-mode etching.…”

Advanced Plasma Processing: Etching, Deposition, and Wafer Bonding Techniques for Semiconductor Applications

“…Using the high selectivity of photoresist for the cryogenic silicon etch, fabrication of high aspect ratio micropillars was demonstrated (Henry et al, 2009a) and serves as an example of achievable profiles using the mixed mode etching process. These pillars were utilized for validating theories concerning radial p-n junctions for applications of solar cells (Kayes et al, 2008).…”

“…High aspect ratio nanopillars have recently been fabricated using this technique, with features as small as 22 nm etched over 1.25 μm deep. In particular, our use of Al 2 O 3 as a mask material along with cryogenic wafer temperatures has demonstrated to increase the etch selectivity of silicon over mask to more than 5000:1, enabling ultrathin masks for nanoscale pattern transfer (Henry et al, 2009a). After patterning, in situ deposition can encapsulate these structures in preparation for further processing.…”

Use of Hard Mask for Finer (<10 μm) Through Silicon Vias (TSVs) Etching

“…Vertical electrical interconnects that pass through the silicon die can reduce the lengths of chip-to-chip interconnections and enable more compact CPI interconnection structures [2,3]. In TSV fabrication, high aspectratio structures with controlled sidewall profiles in silicon are important for microelectronic devices in the nanometer and micrometer scale [4].…”